• 자연과학논문집
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• 제7권
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• pp.27-35
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• 1995

정지영상이나 동영상 코딩에 적용되는 2-D DCT의 효율적인 VLSI 구현을 위한 방법을 제시하였다. 2차원 상태공간식에 근거한 알고리즘 및 데이타 분할기법을 활용하여 다중프로세서 구조에서 문제가 되는 프로세서간의 통신량을 크게 감축시켰으며, 모든 통신을 국부적(local)이 되도록 하였다. 순차 주사 방식의 영상데이타를 입력할 수 있도록 설계하여 입력장치에 소요되는 하드웨어를 최소화하였으며, 계산의 순서를 조정함으로써 일반적인 행.열 분할 방법을 사용하는 2-D DCT에서 필요로 하는 Transposition RAM을 제거하였다. 제안된 VLSI 구조는 실시간 one-chip 2-D DCT 및 보다 큰 2-D DCT로 확장될 수 있다.

• 정보보호학회논문지
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• 제31권3호
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• pp.423-431
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• 2021

SPECK과 SIMON은 NSA(National Security Agency)에서 개발한 경량블록암호이며 SIMECK은 SPECK과 SIMON의 장점을 결합하여 만든 새로운 경량블록암호이다. 본 논문에서는 SPECK, SIMON, SIMECK을 사용한 대용량 암호화를 구현 하는데 있어 병렬 처리에 용이한 GPU를 활용하였다. NVIDIA에서 제공하는 CUDA 라이브러리를 활용하였으며 불필요한 연산들을 제거하기 위해 CUDA 어셈블리 언어 PTX를 사용하여 성능을 극대화 하였다. 단순 CPU 구현과 GPU를 활용한 구현 결과를 비교해보았을 때, 더 빠른 속도로 대용량 암호화를 수행할 수 있었다. 또한 GPU 구현 시, C언어를 사용한 구현과 PTX를 사용한 구현을 비교해 보았을 때, PTX 사용 시, 성능이 더욱 증가하는 것을 확인하였다.

• ETRI Journal
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• 제27권5호
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• pp.557-562
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• 2005

Low-density parity-check (LDPC) codes have recently emerged due to their excellent performance. However, the parity check (H) matrices of the previous works are not adequate for hardware implementation of encoders or decoders. This paper proposes a hybrid parity check matrix which is efficient in hardware implementation of both decoders and encoders. The hybrid H-matrices are constructed so that both the semi-random technique and the partly parallel structure can be applied to design encoders and decoders. Using the proposed methods, the implementation of encoders can become practical while keeping the hardware complexity of the partly parallel decoder structures. An encoder and a decoder are designed using Verilog-HDL and are synthesized using a $0.35 {\mu}m$ CMOS standard cell library.

• 한국통신학회논문지
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• 제38A권12호
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• pp.1145-1147
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• 2013

FFT(Fast Fourier Transform) 알고리즘에는 DIT(Decimation-In-Time)와 DIF(Decimation-In-Frequency)가 있다. DIF 알고리즘은 Radix-2/4/8 등의 다양한 종류와 그 구현 방법이 개발되어 사용되는데 반하여 DIT 알고리즘은 순차적인 출력을 낼 수 있는 장점에도 불구하고 다양한 구현방법이 연구되지 못하였다. 이 논문에서는 DIT Radix-4 알고리즘을 유도하며 반도체 구현을 위한 효율적인 butterfly 구조를 제안한다.

• 전기학회논문지
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• 제58권6호
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• pp.1241-1245
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• 2009

As FFT(Fast Fourier Transform) processor is used in OFDM(Orthogonal Frequency Division Multiplesing) system. According to increase requirement about mobility and broadband, Research about low power and low area FFT processor is needed. So research concern in reduction of memory size and complex multiplier is in progress. Increasing points of FFT increase memory area of FFT processor. Specially, SRU(Signal Reordering Unit) has the most memory in FFT processor. In this paper, we propose a reduced method of memory size of SRU in FFT processor. SRU of 64, 1024 point FFT processor performed implementation by VerilogHDL coding and it verified by simulation. We select the APEX20KE family EP20k1000EPC672-3 device of Altera Corps. SRU implementation is performed by synthesis of Quartus Tool. The bits of data size decide by 24bits that is 12bits from real, imaginary number respectively. It is shown that, the proposed SRU of 64point and 1024point achieve more than 28%, 24% area reduction respectively.

• 수산경영론집
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• 제50권4호
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• pp.45-57
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• 2019

Effective implementation of private subsidy projects requires comprehensive expertise in the aquaculture and construction sectors to be provided to private subsidy operators, local government officials and others involved in budget execution and settlement. Due to the strengthening of laws and systems related to the execution of state subsidies since 2015, the efficient implementation of private-sector grant projects has been difficult for delays in projects, cancellations, and conflicts with local governments from lack of prior awareness and understanding of related regulations. It is expected that the government will be able to activate the project by analyzing the current status and problems of each phase of project implementation for improving quality internalization of the project effects, as well as quantitative growth of the private sector subsidy project for environmentally friendly aquaculture development projects.

• 전자공학회논문지B
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• 제33B권2호
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• pp.197-208
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• 1996

A neural network-based PSRI(position, scale, and rotation invariant) feature extraction and ATR (automatic target recognition) system are proposed and an efficient parallel implementatio of the proposed system using multicomputer is also presented. In the proposed system, the scale and rotationinvariant features are extracted from the contour projection of the number of edge pixels on each of the concentric circles, which is input t the cooperative network. We proposed how to decide the optimum depth and the width of the parallel pipeline system for real time applications by modeling the proposed system into a parallel pipeline implementation method using transputers is also proposed. The implementation results show that we can extract PSRI features less sensitive to input variations, and the speedup of the proposed ATR system is about 7.55 for the various rotated and scaled targets using 8-node transputer system.

• 한국전자거래학회지
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• 제2권1호
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• pp.117-129
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• 1997

As the lifecycle of a product becomes shorter, the communication between a contractor and a supplier in product information has got more importance. The CITIS(Contractor Integrated Technical Information Service) is required to provide authorized users with access to both data and applications they need to complete a task for contract. With the growth of WWW, there has been much study for the use of WWW for the implementation of CALS. The WWW has been proved as an efficient tool for CALS implementation due to its of publicity, openness, and free accessibility. In this study, we suggest using WWW tools, here, an intranet tool, as a basis for the implementation of CITIS

• 대한기계학회:학술대회논문집
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• 대한기계학회 2003년도 춘계학술대회
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• pp.1154-1158
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• 2003

Finite element analysis of welding processes, which entail phase evolution, heat transfer and deformations, is considered in this paper. Attention focuses on numerical implementation of the thermo-elastic-plastic constitutive equation proposed by Leblond in consideration of the transformation plasticity. Based upon the multiplicative decomposition of deformation gradient, hyperelastic formulation is employed for efficient numerical integration, and the algorithmic consistent moduli for elastic-plastic deformations including transformation plasticity are obtained in the closed form. The convergence behavior of the present implementation is demonstrated via a couple of numerical examples.

• 제어로봇시스템학회논문지
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• 제20권3호
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• pp.235-244
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• 2014

This article introduces recent trends in RHC (Receding Horizon Control), also known as MPC (Model Predictive Control), that has been well recognized in industry and academy as a systematic approach for optimal design and constraint management. Constrained and robust RHCs will be briefly reviewed with milestone results. Among the diverse developments and achievements of RHCs, implementation issues will be focused on, together with the latest applications. In particular, this article introduces results on how to solve a finite horizon open-loop optimal control problem in an efficient way, together with code generation for real-time execution and easy implementation. Instead of traditional applications such as refineries and petrochemical plants, this article highlights some selected emerging applications, such as energy management systems and mechatronics, that have resulted from state-of-the-art high performance computing power and advanced numerical schemes.