• 제목/요약/키워드: Effective barrier height

검색결과 41건 처리시간 0.023초

중성자 조사된 SiC Schottky Diode의 온도 의존 특성 (Temperature Dependence of Neutron Irradiated SiC Schottky Diode)

  • 김성수;구상모
    • 한국전기전자재료학회논문지
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    • 제27권10호
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    • pp.618-622
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    • 2014
  • The temperature dependent characteristics on the properties of SiC Schottky Diode has been investigated. In this study, the temperature dependent current-voltage characteristics of the SiC Schottky diode were measured in the range of 300 ~ 500 K. Divided into pre- and post- irradiated device was measured. The barrier height after irradiation device at 500 K increased 0.15 eV compared to 300 K, the barrier height of pre- neutron irradiated Schottky diode increased 0.07 eV. The effective barrier height after irradiation increased from 0.89 eV to 1.05 eV. And ideality factor of neutron irradiated Schottky diode at 500 K decreased 0.428 compared to 300 K, the ideality factor of pre- neutron irradiated Schottky diode decreased 0.354. Also, a slight positive shift in threshold voltage from 0.53 to 0.68 V. we analyzed the effective barrier height and ideality factor of SiC Schottky diode as function of temperature.

차세대 비휘발성 메모리에 사용되는 High-k 절연막의 터널링 특성 (Tunneling Properties in High-k Insulators with Engineered Tunnel Barrier for Nonvolatile Memory)

  • 오세만;정명호;박군호;김관수;정홍배;이영희;조원주
    • 한국전기전자재료학회논문지
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    • 제22권6호
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    • pp.466-468
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    • 2009
  • The metal-insulator-silicon (MIS) capacitors with $SiO_2$ and high-k dielectrics ($HfO_2$, $Al_2O_3$) were fabricated, and the current-voltage characteristics were investigated. Especially, an effective barrier height between metal gate and dielectric was extracted by using Fowler-Nordheim (FN) plot and Direct Tunneling (DT) plot of quantum mechanical(QM) modeling. The calculated barrier heights of thermal $SiO_2$, ALD $SiO_2$, $HfO_2$ and $Al_2O_3$ are 3.35 eV, 0.6 eV, 1.75 eV, and 2.65 eV, respectively. Therefore, the performance of non-volatile memory devices can be improved by using engineered tunnel barrier which is considered effective barrier height of high-k materials.

장애물 없는 생활환경(BF) 인증제도 계단 난간 높이 산정기준 개선안 (Improvement plan for the standard for calculating the height of the stair railing for Barrier Free (BF) certification system)

  • 이상수;방홍순;김옥규
    • 한국건축시공학회:학술대회논문집
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    • 한국건축시공학회 2022년도 봄 학술논문 발표대회
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    • pp.218-219
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    • 2022
  • Among the Barrier Free (BF) certification evaluation items for public facilities, at which position the standard for the effective height of the stair railing handle should be calculated is not clearly determined. Because of this, not only the evaluation standards of the certification authority and the evaluation committee are different, but disputes are occurring between the ordering organization, the design company, and the construction company. Therefore, the stair railing installation standard laws for public facilities were analyzed and through a case study of institutions that obtained the BF certification, problems were analyzed. The results of problem analysis reveal the following. 1) The standards of the Ministry of Health and Welfare and the Ministry of Land, Infrastructure, and Transport were different. 2) The effective height calculation standard was ambiguous, and disputes occurred frequently. To solve this problem, we proposed improvement plans for calculating the height of the stair railing that can comply with laws while ensuring safety.

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4H-SiC JBS Diode의 전기적 특성 분석 (Electrical Characteristics of 4H-SiC Junction Barrier Schottky Diode)

  • 이영재;조슬기;서지호;민성지;안재인;오종민;구상모;이대석
    • 한국전기전자재료학회논문지
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    • 제31권6호
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    • pp.367-371
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    • 2018
  • 1,200 V class junction barrier schottky (JBS) diodes and schottky barrier diodes (SBD) were simultaneously fabricated on the same 4H-SiC wafer. The resulting diodes were characterized at temperatures from room temperature to 473 K and subsequently compared in terms of their respective I-V characteristics. The parameters deduced from the observed I-V measurements, including ideality factor and series resistance, indicate that, as the temperature increases, the threshold voltage decreases whereas the ideality factor and barrier height increase. As JBS diodes have both Schottky and PN junction structures, the proper depletion layer thickness, $R_{on}$, and electron mobility values must be determined in order to produce diodes with an effective barrier height. The comparison results showed that the JBS diodes exhibit a larger effective barrier height compared to the SBDs.

A Study of the Dependence of Effective Schottky Barrier Height in Ni Silicide/n-Si on the Thickness of the Antimony Interlayer for High Performance n-channel MOSFETs

  • Lee, Horyeong;Li, Meng;Oh, Jungwoo;Lee, Hi-Deok
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제15권1호
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    • pp.41-47
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    • 2015
  • In this paper, the effective electron Schottky barrier height (${\Phi}_{Bn}$) of the Ni silicide/n-silicon (100) interface was studied in accordance with different thicknesses of the antimony (Sb) interlayer for high performance n-channel MOSFETs. The Sb interlayers, varying its thickness from 2 nm to 10 nm, were deposited by radio frequency (RF) sputtering on lightly doped n-type Si (100), followed by the in situ deposition of Ni/TiN (15/10 nm). It is found that the sample with a thicker Sb interlayer shows stronger ohmic characteristics than the control sample without the Sb interlayer. These results show that the effective ${\Phi}_{Bn}$ is considerably lowered by the influence of the Sb interlayer. However, the current level difference between Schottky diodes fabricated with Sb/Ni/TiN (8/15/10 nm) and Sb/Ni/TiN (10/15/10 nm) structures is almost same. Therefore, considering the process time and cost, it can be said that the optimal thickness of the Sb interlayer is 8 nm. The effective ${\Phi}_{Bn}$ of 0.076 eV was achieved for the Schottky diode with Sb/Ni/TiN (8/15/10 nm) structure. Therefore, this technology is suitable for high performance n-channel MOSFETs.

중국 사막지역의 방풍책 높이와 공극률에 따른 방풍효과 및 설치비용 비교분석 (Comparative Analysis of Windbreak Effect and Installation Cost of Sand Barrier with Different Height and Porosity on Sand Land in China)

  • 박기형;정국동;방엄령;김찬범;오빈;포암봉;고엄뢰;정성철;문강민
    • 한국환경복원기술학회지
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    • 제15권6호
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    • pp.29-41
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    • 2012
  • This study was conducted in Ningxia Hui autonomous region, located at southern part of Mu Us sand land in China. To investigate relationships between windbreak effect and installation cost of sand barriers, plastic net is utilized by using four kind of heights (0.2, 0.3, 0.4 and 0.5m) and four kind of porosities (20, 30, 50 and 70%). These heights and porosities are measured for estimating distances for effective windbreak. It is shown that porosity and the distance have a positive relationship at same heights and porosity on ground indicates a constant figure when height reaches a certain level, regardless of the porosity. This implies that there is a difference of level of windbreak with different porosities; however, distance of windbreak effect is same at the same height of sand barrier. As a result of comparison between porosity of sand barrier on the ground and installation cost in each sand barrier with various heights and porosities (16 combinations), 0.4m and 0.5m height sand barriers describe highest economical efficiency. Within two variables, we concluded that height has a higher impact on windbreak effect than porosity.

절연막 형성 방법에 따른 다결정실리콘 캐패시터의 특성 (Characteristics of polysilicon capacitor as insulator formation method)

  • 노태문;이대우;김광수;강진영;이덕문
    • 전자공학회논문지A
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    • 제32A권7호
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    • pp.58-68
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    • 1995
  • Polysilicon capacitors with pyrogenic oxide and TEOX oxide as insulators were fabricated to develop capacitors which can be applied to analog CMOS IC, and the characteristics of the capacitors were compared with each other. The morphology of bottom polysilicon in pyrogenic oxide capacitor is degraded due to the generaged protuberances of the polysilicon grain during oxidataion. The polysilican capacitor with pyrogenic oxide of 57 nm thickness showed that the effective potential barrier height of 0.45 eV is much less than that of MOS capacitor (3.2 eV)when the top electrode is biased with a positive volgate. The morphology of the polysilicon capacitor with TEOS oxide, however, was not degraded during oxide deposition by LPCVD. The polysilicon capacitor with TEOS oxide of 54 nm thickness showed the effective potential barrier height of 1.28 eV when the top electrode is biased with a negative voltage. Therefore, it is concluded that the polysilicon capacitor with TEOS oxide is more applicable to analog CMOS IC than the pyrogenic oxide polysilicon capacitor.

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2단계 AlOx 절연층 공정에서 하부절연층의 산화시간에 따른 터널자기저항 특성연구 (Tunnel Magnetoresistance with Plasma Oxidation Time in Double Oxidized Barrier Process)

  • 이영민;송오성
    • 한국재료학회지
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    • 제12권3호
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    • pp.200-204
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    • 2002
  • We fabricated TMR devices which have double oxidized tunnel barrier using plasma oxidation method to form homogeneously oxidized AlO tunnel barrier. We sputtered 10 $\AA$-bottom Al layer and oxidized it by varying oxidation time for 5, 10, 20 sec. Subsequent sputtering of 13 $\AA$ - Al was performed and the matallic layer was oxidized for 120 sec. The electrical resistance changed from 700$\Omega$ to 2700$\Omega$ with increase of oxidation time, while variation of MR ratio was little spreading 27~31% which is larger than that of TMR device of ordinary single tunnel barrier. We calculated effective barrier height and width by measuring I-V curves, from which we found the barrier height was 1.3~1.5 eV, sufficient for tunnel barrier, and the barrier width(<16.2 $\AA$) was smaller than that of directly measured value by the tunneling electron microscopy. Our results may be caused by insufficient oxidation of Al precursor into $Al_2O_3$. However, double oxidized tunnel barriers were superior to conventional single tunnel barrier in uniformity and density. We found that the external magnetic field to switch spin direction of ferromagnetic layer of pinned layer breaking ferro-antiferro exchange coupling was increased as bottom layer oxidation time increased. Our results imply that we were able to improve MR ratio and tune switching field by employing double oxidized tunnel barrier process.

축척모형 실험에 의한 고속전철 방음벽용 소음저감 장치 (Noise reduction of noise barrier with noise reducer for high speed train by using scale down model test)

  • 정성수;전병수;나희승;김준엽;양신추
    • 한국소음진동공학회:학술대회논문집
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    • 한국소음진동공학회 2001년도 추계학술대회논문집 II
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    • pp.647-652
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    • 2001
  • A noise reduction of noise barrier for high speed train was measured by using scale down model test. A selected types of noise barriers were simple vertical barrier, interference type barrier with plate, interference type barrier with cylindrical pipes. On experiment, in order to make similar present test lane condition, reduced train model and multiple noise sources were considered. As a result. interference type noise barrier with cylindrical pipes is most effective than other barriers. A present height of noise barrier which is established in a test lane is not high enough for reducing patograph noise.

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방음벽 상단부 형상에 따른 삽입손실 연구 (A Study on the Insertion Loss of Noise Barrier with the Variation of Top Shape)

  • 정성수;김용태;이우섭
    • 한국음향학회지
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    • 제21권7호
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    • pp.624-631
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    • 2002
  • 방음벽의 상단부 형상에 따른 삽입손실을 무향실에서 모형축척 방법으로 측정하고 상호 비교하였다. 높이 0.3m의 수직형 방음벽에 대한 삽입손실과 간단한 형상물을 상단부에 설치한 방음벽의 삽입손실과의 차를 비교하였다. 실험결과 단순히 높이를 증가시키는 경우보다 상단부에 간단한 형상을 설치한 것이 더 효과적이었다. 'T'형, 'Y'형 및 '(equation omitted)'형 방음벽에 대한 삽입손실을 비교한 결과 'T'형과 '(equation omitted)'형 방음벽은 비슷하였으며 'Y'형이 가장 좋은 효과를 나타냈다. 본 연구결과는 Alfredson(PIOC. Inter-Noise 95, p. 381, 1995)등의 결과와는 잘 일치하지만 May (J. Sound Vib. 71, p. 73, 1980) 등의 결과와는 상충된다. 따라서 어떤 형태가 가장 좋은지를 결정하는 것은 어렵다. 왜 이러한 상호 모순되는 결과를 얻게 되는가를 알기 위해 경계요소법을 적용한 결과 각 연구자들마다 다른 방음벽의 높이, 음원과 수음점의 위치, 높이와 거리를 서로 다른 실험조건을 가정했기 때문임을 알 수 있었다.