• 제목/요약/키워드: Dual process

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쌍대반응표면최적화를 위한 사후선호도반영법: TOPSIS를 활용한 최고선호해 선택 (A Posterior Preference Articulation Method to Dual-Response Surface Optimization: Selection of the Most Preferred Solution Using TOPSIS)

  • 정인준
    • 지식경영연구
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    • 제19권2호
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    • pp.151-162
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    • 2018
  • Response surface methodology (RSM) is one of popular tools to support a systematic improvement of quality of design in the product and process development stages. It consists of statistical modeling and optimization tools. RSM can be viewed as a knowledge management tool in that it systemizes knowledge about a manufacturing process through a big data analysis on products and processes. The conventional RSM aims to optimize the mean of a response, whereas dual-response surface optimization (DRSO), a special case of RSM, considers not only the mean of a response but also its variability or standard deviation for optimization. Recently, a posterior preference articulation approach receives attention in the DRSO literature. The posterior approach first seeks all (or most) of the nondominated solutions with no articulation of a decision maker (DM)'s preference. The DM then selects the best one from the set of nondominated solutions a posteriori. This method has a strength that the DM can understand the trade-off between the mean and standard deviation well by looking around the nondominated solutions. A posterior method has been proposed for DRSO. It employs an interval selection strategy for the selection step. This strategy has a limitation increasing inefficiency and complexity due to too many iterations when handling a great number (e.g., thousands ~ tens of thousands) of nondominated solutions. In this paper, a TOPSIS-based method is proposed to support a simple and efficient selection of the most preferred solution. The proposed method is illustrated through a typical DRSO problem and compared with the existing posterior method.

패키지후 프로그램을 이용 스큐 수정이 가능한 광범위한 잠금 범위를 가지고 있는 이중 연산 DLL 회로 (A Wide - Range Dual-Loop DLL with Programmable Skew - Calibration Circuitry for Post Package)

  • 최성일;문규;위재경
    • 대한전자공학회논문지SD
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    • 제40권6호
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    • pp.408-420
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    • 2003
  • 이 논문에서는 1) 넓은 잠금 범위를 위한 이중 루프 동작과 2) 차세대 패키지 스큐 개선에 대한 전압 발생기와 안티퓨즈 회로를 사용한 프로그래머블 레프리카 딜레이, 두 가지 이점을 갖는 Delay Lock Loop(DLL)을 기술하였다. 이중 루프 동작은 차동 내부 루프 중 하나를 선택하기 위해 외부 클럭과 내부 클럭 사이의 초기 시간차에 대한 정보를 사용한다. 이를 이용하여 더 낮은 주파수로 DLL의 잠금 범위를 증가시킨다. 덧붙여서, 전압발생기와 안티퓨즈 회로를 사용한 프로그래머블 레프리카 딜레이의 결합은 패키지 공정 후에 온-오프 칩 변화로부터 발생하는 외부 클럭과 내부 클럭 사이에 스큐 제거를 해준다. 제안된 DLL은 0.16um 공정으로 제조되었고, 2.3v의 전원 공급과 42㎒ - 400㎒의 넓은 범위에서 동작한다. 측정된 결과는 43psec p-p 지터와 400㎒에서 52㎽를 소비하는 4.71psec 실효치(rms)지터를 보여준다.

다문화가정 청소년자녀의 공적개발원조 (Official Development Assistance: ODA) 인력 양성을 위한 탐색적 연구 (Exploratory Study of the Potential for Adolescent Children from Multi-Cultural Families to Be Trained as Competent Personnel in Charge of ODA)

  • 박미석;김경아
    • 가족자원경영과 정책
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    • 제20권3호
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    • pp.95-113
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    • 2016
  • This study investigates the potential for multi-cultural youths, given their innate bilingual and dual culture, to be trained as the competent ODA professionals. For the purpose of collecting information, we organized two different kinds of FGI in 2015. The first FGI was conducted with a group of 10 expert participants from August 17 to September 25. The second FGI was conducted four times, from October 5 to October 23, with 13 adolescents from multi-cultural families from Russia, Mongolia, Vietnam, India, Indonesia, Japan, and China. The semi-structured interview items were passed through a formal review process of the Institutional Ethics Committee. Furthermore, with the participants' pre-consent to recording, all recorded data were categorized through the transcription process. The results are as follows. While the potential for nourishing bilingual and dual cultural capabilities are high for the adolescent children of multi-cultural families, the expert group also emphasized the negative aspects of these capabilities being suppressed due to the relatively oppressed family environment. The expert group therefore suggests the following: building parent awareness of ODA human resources, developing an educational career transition roadmap, and providing institutional incentives for ODA. In addition, to some extent, the researchers were able to detect some positive self-esteem among the adolescent children of multi-cultural families as a result of the bilingual and dual cultural competencies required to be ODA personnel. In sum, the research provides insight into the need for national social support for the adolescent children of multi-cultural families, so that their strengths are not extinguished, in order that they might grow up as competent ODA personnel.

직무적합이 경력만족에 미치는 영향에서 일의 의미와 직무몰입의 이중매개 효과 (The Dual Mediation of Work Meaningfulness and Job Involvement on the Relationship Between Person-job Fit and Career Satisfaction)

  • 정승철
    • 벤처혁신연구
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    • 제6권2호
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    • pp.145-157
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    • 2023
  • 본 연구는 최근 직장인들과 인사담당자들의 관심을 받고 있는 직무적합, 일의의미, 직무몰입, 경력만족이 서로 어떠한 관계가 있는지를 확인하고자 하였다. 선행연구를 통해서 이들 변인들은 직무적합에서 시작하여 일의의미, 직무몰입을 거쳐 경력만족에 이르는 경로가 논리적으로 타당한 것으로 확인되었으며, 이러한 이중매개효과를 검증하고자 하였다. 283명의 직장인을 대상으로 설문조사를 실시하였으며, SPSS 21과 Process Macro를 통하여 자료를 분석하였다. 연구의 주요 결과는 다음과 같다. 직무적합, 일의의미, 직무몰입, 경력만족은 각각 정적인 상관을 보였으며, 직무적합과 경력만족 간의 관계에 대한 일의의미와 직무몰입의 이중매개효과는 통계적으로 유의미한 것으로 확인되었다. 이러한 결과는 일의의미와 직무몰입, 경력만족 등의 긍정적 심리변인의 수준을 높여 인적자원의 이탈을 막고, 조직의 지속적인 성과를 위해서 직장인이 자신의 직무가 자신의 특성과 적합하다고 지각할 수 있도록 직무를 설계할 필요가 있다는 것을 의미한다. 연구의 시사점, 한계점 그리고 향후 연구에 대한 제언 등을 결론에 제시하였다.

On-chip Inductor Modeling in Digital CMOS technology and Dual Band RF Receiver Design using Modeled Inductor

  • Han Dong Ok;Choi Seung Chul;Lim Ji Hoon;Choo Sung Joong;Shin Sang Chul;Lee Jun Jae;Shim SunIl;Park Jung Ho
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2004년도 학술대회지
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    • pp.796-800
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    • 2004
  • The main research on this paper is to model on-chip inductor in digital CMOS technology by using the foundry parameters and the physical structure. The s-parameters of a spiral inductor are extracted from the modeled equivalent circuit and then compared to the results obtained from HFSS. The structure and material of the inductor used for modeling in this work is identical with those of the inductor fabricated by CMOS process. To show why the modeled inductor instead of ideal inductor should be used to design a RF system, we designed dual band RF front-end receiver and then compared the results between when using the ideal inductor and using the modeled inductor.

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Improved Bias Stress Stability of Solution Processed ITZO/IGZO Dual Active Layer Thin Film Transistor

  • Kim, Jongmin;Cho, Byoungdeog
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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    • pp.215.2-215.2
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    • 2015
  • We fabricated dual active layer (DAL) thin film transistors (TFTs) with indium tin zinc oxide (ITZO) and indium gallium zinc oxide (IGZO) thin film layers using solution process. The ITZO and IGZO layer were used as the front and back channel, respectively. In order to investigate the bias stress stability of ITZO SAL (single active layer) and ITZO/IGZO DAL TFT, a gate bias stress of 10 V was applied for 1500 s under the dark condition. The SAL TFT composed of ITZO layer shows a poor positive bias stability of ${\delta}VTH$ of 13.7 V, whereas ${\delta}VTH$ of ITZO/IGZO DAL TFT was very small as 2.6 V. In order to find out the evidence of improved bias stress stability, we calculated the total trap density NT near the channel/gate insulator interface. The calculated NT of DAL and SAL TFT were $4.59{\times}10^{11}$ and $2.03{\times}10^{11}cm^{-2}$, respectively. The reason for improved bias stress stability is due to the reduction of defect sites such as pin-hole and pores in the active layer.

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신선 가공된 이상 조직강의 냉간 성형성에 대한 연구 (Study on the Cold Formability of Drawn Dual-Phase Steels)

  • 박경수;최상우;이덕락;이종수
    • 한국소성가공학회:학술대회논문집
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    • 한국소성가공학회 2003년도 추계학술대회논문집
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    • pp.269-273
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    • 2003
  • There is a growing interest to replace the commercial steels with non-heat treated steels, which does not involve the spheroidization and quenching-tempering treatment. However, Non-heat treated steels should satisfy high strength and good formability without performing heat treatment. Therefore, it is important to investigate optimum materials showing a good combination of strength and formability after the drawing process. In this study, Dual-Phase Steels were studied as candidate materials for non-heat treated steels, which have different martensite morphologies and volume fractions obtained through heat-treatment of intercritical quenching (IcQ), intermediate quenching (ImQ) and step quenching (SQ). The mechanical properties of DP steels were measured by tension and compression tests. Also, the cold formability of three DP steels which have similar tensile strength value was investigated by estimating the deformation resistance and the forming limit. The deformation resistance which is important factor in determining die life was estimated by calculating the deformation energy. And the forming limit was estimated by measuring the critical strain revealing crack initiation at the notch tip of the specimens.

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충전제 투입 위치 이원화에 의한 고충전지 제조 (II) - 전분 투입 위치의 영향 - (Production of High Loaded Paper by Dual Flow Addition of Fillers (II) - Effect of Location of Starch Addition -)

  • 최도침;원종명;조병욱
    • 펄프종이기술
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    • 제47권1호
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    • pp.84-92
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    • 2015
  • Fillers have been used to improve the optical and printing properties and to reduce the production cost while increasing the filler content in paper causes adverse effects on paper strength. In the previous study, it was shown that the thick stock addition of filler can increase the filler content without significantly sacrificing paper strength. This study was carried out to elucidate the effect of the location of starch addition (before or after the filler addition) on handsheet properties and a papermaking process as a part of developing the thick stock loading technology. In addition, effects of dual flow addition of cationic starch were evaluated. It was found that paper strength was superior when cationic starch was added after the filler addition. No adverse effects on optical properties, formation and filler retention were observed. Drainage was a bit slower when starch was added after the filler addition, which shall be resolved with regulating other factors. Dual flow addition of cationic starch before and after filler addition did not show any special advantage.

Design and Evaluation of a CMOS Image Sensor with Dual-CDS and Column-parallel SS-ADCs

  • Um, Bu-Yong;Kim, Jong-Ryul;Kim, Sang-Hoon;Lee, Jae-Hoon;Cheon, Jimin;Choi, Jaehyuk;Chun, Jung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권1호
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    • pp.110-119
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    • 2017
  • This paper describes a CMOS image sensor (CIS) with dual correlated double sampling (CDS) and column-parallel analog-to-digital converter (ADC) and its measurement method using a field-programmable gate array (FPGA) integrated module. The CIS is composed of a $320{\times}240$ pixel array with $3.2{\mu}m{\times}3.2{\mu}m$ pixels and column-parallel 10-bit single-slope ADCs. It is fabricated in a $0.11-{\mu}m$ CIS process, and consumes 49.2 mW from 1.5 V and 3.3 V power supplies while operating at 6.25 MHz. The measured dynamic range is 53.72 dB, and the total and column fixed pattern noise in a dark condition are 0.10% and 0.029%. The maximum integral nonlinearity and the differential nonlinearity of the ADC are +1.15 / -1.74 LSB and +0.63 / -0.56 LSB, respectively.

50%듀티 싸이클 버퍼를 가진 산술 연산 구조의 이중 대역 CMOS 전압 제어 발진기 (A Dual band CMOS Voltage Controlled Oscillator of an arithmetic functionality with a 50% duty cycle buffer)

  • 한윤철;김광일;이상철;변기영;윤광섭
    • 대한전자공학회논문지TC
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    • 제41권10호
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    • pp.79-86
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    • 2004
  • 본 논문은 0.35㎛ CMOS 공정을 이용하여 1.070GHz와 2.07GHz의 주파수를 생성해내는 이중 대역 전압 제어 발진기를 제안한다. 50% 듀티 싸이클 회로와 반가산기를 가진 제안된 전압 제어 발진기는 일반적인 전압 제어 발진기의 주파수보다 두 배 높은 주파수를 생성해낼 수 있다 제안된 전압 제어 발진기의 측정 결과는 전압 제어 발진기 이득과 전력 소모가 각각 561MHz/V, 14.6mW로 나타났다. 이중 대역 전압 제어 발진기의 위상 잡음은 각각 1.07GHz와 2.07GHz로부터 2MHz 옵셋 주파수에서 -102.55dBc/Hz와 -95.88dBc/Hz로 측정되었다.