• Journal of Digital Contents Society
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• v.18 no.7
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• pp.1451-1456
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• 2017

In this research we discuss an integrated actuator-control system for advanced control of a smart Shape Memory Alloy (SMA) actuator. Toward this goal, we designed and fabricated an actuator-control module combining two SMA actuating units with a single-chip microprocessor, two different sensing elements, and an actuator driver. In our proposed system, sensing elements include a 6-axis single-chip motion sensor for orientation measurement and a circuit for resistance measurement of SMA wires. We experimentally verified our proposed actuator-control system using actuator driving, sensor data readings, and communication tests.

• Progress in Superconductivity and Cryogenics
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• v.17 no.3
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• pp.51-56
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• 2015

Cryogenic cooling system for HTS electric power devices requires a reliable and efficient high-capacity cryocooler. A Striling cryocooler with a linear compressor can be a good candidate. It has advantages of low vibration and long maintenance cycle compared with a kinematic-driven Stirling cryocooler. In this study, we developed dual-opposed linear compressor of 12 kW electric input power with two 6 kW linear motors. Electrical performance of fabricated linear compressor is verified by experimental measurement of thrust constant. The developed Stirling cryocooler has gamma-type configuration. Piston and displacer are supported with flexure spring. A slit-type heat exchanger is adopted for cold and warm-end, and the generated heat is rejected by cooling water. In cooling performance test, waveforms of voltage, current, displacement and pressure are obtained and their amplitude and phase difference are analysed. Moreover, temperatures of cooling water, housing and linear motor are recorded and electric power parameters of driving circuit are also obtained. The developed Stirling cryocooler reaches to 47.8 K within 23.4 min. with no-load. From heat load tests, it shows cooling capacity of 440 W at 78.1 K with 6.45 kW of electric input power and 19.4 of % Carnot COP.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1009-1012
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• 2008

We have succeeded in producing the world $1^{st}$ TFT LCD panel adapting the data line sharing method. In the data line sharing structure, two neighboring pixels share one data line. We also adapted time shared data driving with a-Si TFT based circuit integration technology of LG Display's own. By using these technologies, we can reduce the number of source driver ICs by half, compared to that of the existing gate driver integrated TFT LCD panel.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.181-185
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• 2006

The flexible 2-inch AMOLED with $176{\times}144$ pixels has been demonstrated using top emission OLED driven by organic thin film transistors (OTFTs). For the development of AMOLED display on plastic substrate, we have developed several integration and unit process technologies. Through the optimization of the process based on plastic substrate, OTFT backplane with 2 transistors and 1 capacitor in a pixel has been fabricated and integrated with top emission OLED. The active addressing by OTFT driving circuit has been achieved and green light with 15 $cd/m^2$ at 15V has been observed.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.68-71
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• 2003

To be able to show moving images without visual problems like blurring and tailing, the response time of liquid crystal display (LCDs) must be improved. In this paper we will discuss our progress in improving the response time by optimizing the cell configuration and the use of new liquid crystal mixtures. A 20.1inch diagonal UXGA IPS TFT-LCD has been developed having a response time as fast as l-frame time (16msec) for white-black operation and less than 16msec in all gray levels without applying ODC (Over Driving Circuit). This is very important because one of the technology to reduce motion blurring, the use of scanning backlight is conditioned by 16msec for all grays. The excellent gray-to-gray response can be explained by virtue of fundamental characteristics of S-IPS mode and makes a good contrast with the results of VA mode.

• Proceedings of the KIEE Conference
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• 2001.11c
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• pp.284-287
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• 2001

In this paper, we designed and implemented a precise pulse motor control chip that generates the parabolic speed pattern. This chip can control step motor[1], DC servo[2] and AC servo motors at high speed and precisely. It can reduce the mechanical vibration to the minimum at the change point of a degree of acceleration. Because the parabolic speed pattern has the continuous acceleration change. In this paper, we present the pulse generation algorithm and the parabolic pattern speed generation. We verify these algorithm using visual C++. We designed this chip with VHDL(Very High Speed Integrated Circuit Hardware Description Language) and executed a logic simulation and synthesis using Synopsys synthesis tool. We executed the pre-layout simulation and post-layout simulation with Verilog-XL simulation tool. This chip was produced with 100 pins, PQFP package by 0.35 um CMOS process and implemented by completely digital logic. We developed the hardware test board and test program using visual C++. We verify the performance of this chip by driving the servo motor and the function by GUI(Graphic User Interface) environment.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.463-464
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• 2008

As the demands of LCD and PDP TV are increasing, the high performance HVICs(High Voltage Gate Driver ICs) technology is becoming more necessary. In this paper, we designed the HVIC that has enhanced noise immunity and high driving capability. It can operate at 500KHz switching frequency and permit 600V input voltage. High-side level shifter is designed with noise protection circuit and schmitt trigger. Therefore it has very high dv/dt immunity, the maximum being 50V/ns. The HVIC was designed using $1{\mu}m$ BCD 650V process and verified by Spectre and PSpice of Cadence inc. simulation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.7 no.1
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• pp.43-52
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• 1996

Nonreciprocal twin-toroid ferrite phase shifter is designed, fabricated, and tested. ABCD matrix method is used to design the phase shifter and to compute its optimum dimen- sions. Quarter-wave two-section impedance matching transformers are utilized in order to match the impedance of the empty guide to that of the ferrite-loaded guide. Driving circuit controls the current needed to drive the phase shifter. Measured insertion loss and VSWR characteristics within the operaring band(9.1GHz ~ 9.5GHz) are less than 1.2dB and 1.15, respectively. After temperature compensation technique is appied to the phase shifter, the measured phase error of the phase shifter is less than $\pm4$ between $-10^{\circ}C\;and\;+60^{\circ}C$.

• The Journal of the Acoustical Society of Korea
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• v.16 no.5
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• pp.12-17
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• 1997

In this work, we developed a new type ultrasonic dehumidifier with piezoelectric ceramics, which and efficiently repel waterdrops on outdoor glass plates exposed to raindrops. Through finite element analysis of a certain type of glass plates to analyze its dynamic behavior, the structure of the ultrasonic device we determined to get the optimal performance. A supplemental metal plate was attached to the glass plate for uniform cleaning. Based on the theoretical results, experimental samples were fabricated and evaluated with various dimensions of the glass plate and the piezoceramic vibrator. Driving circuit for the dehumidifier made use of the frequency sweeping technique to keep track of the resonant frequency of the glass plate that was variant with environmental conditions.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.3
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• pp.96-102
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• 2009

This paper deals with gate drive and power IC for high power devices(600V/200A and 1200V/150A). The proposed gate driver provides high gate driving capability (4 A source, 8 A sink), and over-current protected by means of power transistor desaturation detection. In addition, soft-shutdown function is added to reduce voltage overshoots due to parasitic inductance. This gate drive If is designed, fabricated, and tested using the Dongbu hitek 0.35um BCDMOS process.