• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.2
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• pp.132-139
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• 2002

This paper describes a supply voltage detector and SRAM write driver circuit which dissipates small power. The supply voltage detector generates high signal when supply voltage is higher than reference voltage, but low signal when supply voltage is lower than reference voltage. The write driver utilizes two same-sized drivers to reduce operating current in the write cycle. In the case of lower supply voltage comparing to Vcc, both drivers are active the same as conventional write driver, while in the case of high Vcc only one of two drivers are active so as to deliver the half of the current. As a result of simulation using 0.6${\mu}{\textrm}{m}$ 3.3v/5v, CMOS model parameter, the proposed SRAM scheme shows a 22.6% power reduction and 12.7% PDP reduction at Vcc=3.3V, compared to the conventional one.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.4 s.119
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• pp.364-371
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• 2007

In this paper, the design and implementation of high-power PIN diode switch modules and high-speed switch driver circuits are presented for Wibro base stations. To prevent isolation degradation due to parasitic inductances of conventional packaged PIN diodes and to improve power handling capabilities of the switch modules, bare diode chips are used and carefully placed in a PCB layout, which makes bonding wire inductances to be absorbed in the impedance of a transmission line. The switch module is designed and implemented to have a maximum performance while using a minimum number of the diodes. It shows an insertion loss of ${\sim}0.84\;dB$ and isolation of 80 dB or more at 2.35 GHz. The switch driver circuit is also fabricated and measured to have a switching speed of ${\sim}200\;nsec$. The power handling capability test demonstrates that the module operates normally even under a digitally modulated 70 W RF signal stress.

• The Journal of the Korea Contents Association
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• v.7 no.1
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• pp.116-123
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• 2007

This paper proposed a new amplitude width modulation for OLED data driver IC. The data driver controls brightness of OLED by adjusting amplitude and width of the data drive current pulse. There were two conventional methods; pulse amplitude modulation(PAM) and pulse width modulation(PWM). The PWM method suffered from lower light emitting time efficiency at low luminance signal. The PAM method suffered from large chip area using DACs for each column. The proposed method was aiming at accurately controlling of the current level by MSB data and light emitting efficiency by LSB data to improve the inefficiencies of the PAM and a PWM. The proposed AWM driver circuit implemented using $0.35-{\mu}m$ 3-poly 4-metal CMOS high voltage process. The simulation result shows the improvement in the accuracy of the gray level control even though the driver circuit is smaller than the PAM.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.4A
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• pp.408-416
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• 2010

A dumbbell-type CPW transmission-line structure has been proposed to improve the return loss of the transmission line between a driver IC and flip-chip-bonding VCSEL(Vertical Cavity Surface Emitting Laser) in a hybrid opto-electric circuit board(OECB). The proposed structure used a pair of dummy ground solder balls on the ground lines for flip-chip bonding of the VCSEL and designed the dumbbell-type CPW transmission line to improve reflection characteristics. The simulated results revealed that the return loss of the dumbbell-type CPW transmission line was 13-dB lower than the conventional CPW transmission line. A 4-dB improvement in the return loss was obtained using the dummy ground solder balls on the ground lines. The variation rate of the reflection characteristic with the variation of terminal impedances of the transmission line (at the output terminal of the driver IC and the input terminal of the VCSEL) is about ${\pm}2.5\;dB$.

• Journal of Power Electronics
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• v.15 no.1
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• pp.146-159
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• 2015

Since the power capacity needed for the propulsion of large ships is very large, a multiphase AC induction propulsion mode is generally adopted to meet the higher requirements of reliability, redundancy and maintainability. This paper gives a detailed description of the development of a 20MW fifteen-phase PWM driver for advanced fifteen-phase propulsion induction motors with a special third-harmonic injection in terms of the main circuit hardware, control system design, experiments, etc. The adoption of the modular design method for the main circuit hardware design can make the enclosed mechanical structure simple and maintainable. It can also avoid the larger switch stresses caused by the multiple turn on of the IGBTs in conventional large-capacity converter systems. The use of the distributed controller design method based on a high-speed fiber-optic ring net for the control system can overcome such disadvantages as the poor reliability and long maintenance times arising from the conventional centralized controller which is designed according to point-to-point communication. Finally, the performance of the 20MW PWM driver is verified by experimentation on a new fifteen-phase induction propulsion motor.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.6
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• pp.560-568
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• 2005

The proposed Multi-level PDP sustain Driver is composed of the semiconductor devices with low voltage rating compared to those used in the prior circuit proposed by L. Wether, and it has two resonant periods during the charging (rising period) and discharging (falling period) the PDP in the sustaining voltage waveforms. In accordance with the change of timing phase$(T_{r1},\;T_{i1},\;T_{r2})$, the performance characteristics of a commercial PDP module has been carried out and compared the characteristic with the 42V6, made of LG Electronics co., Experimental results show that the performance characteristics of PDP module are greatly influenced by the variation of $T_{i1}\;and\;T_{r2}$. The variation of $T_{r1}$ do not influence much on the performances of PDP. With the conditions that $T_{r1}=60ns,\;T_{i1}=120ns,\;and\;T_{r2}=350ns$, we could get the performances listed as the luminance is increased $14.6\%$, the power consumptions is decreased $5.9\%$, the panel efficiency is increased $24.2\%$, module efficiency is increased $21.2\%$, compared to those shown in the commercial PDP module (42V6). Therefore, the proposed multi-level PDP sustain driver expected to be suitable to actual PDP module application.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.7
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• pp.17-22
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• 2008

This paper presents a low-power and small-area pulse width modulator by light intensity for photoflash. Light intensity controller is achieved by using capacitor, photodiode, and comparator. The proposed circuit designs digital circuit to reduce static power consumption except comparator. And IGBT driver has short circuit protection using delay cell. The pulse width modulator has the operating range of $V_{MS}$ from 0.5V to 2.5V and pulse width of output from 0.14ms to 1.65ms at 300Hz. The pulse width modulator fabricated in $0.35-{\mu}m$ CMOS technology occupies $0.85mm{\times}0.56mm$. This circuit consumes 3.0mW at 300Hz and 3.0V.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.948-950
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• 2003

In this literature, the CMOS current mode fout quadrant differentiator circuit is proposed. The implementation is base on an appropriate input stage that converts the input current into a compressed voltage at the input capacitor ($C_{gs}$) of the CMOS driver circuit. This input voltage use as the control output current which flow to the output node by passing through a MOS active load and use it as the feedback voltage to the input node. Simulation results with level 49 CMOS model of MOSIS are given to demonstrate the correct operation of the proposed configuration. But the gain of the circuit is too low so the output differentiate current also low. The proposed differentiator is expected to find several applications in analog signal processing system.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.8
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• pp.392-401
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• 2001

This paper presents the single-stage high power factor AC to DC converter operated in active-clamp mode. The proposed converter is added active-clamping circuit to boost-flyback single-stage power factor corrected power supply. The active-clamping circuit limits voltage spikes, recycles the energy trapped in the leakage inductance, and provides a mechanism for achieving soft switching of the electronic switches to reduce the switching loss. The auxiliary switch of active-clamping circuit uses the same control and driver circuit as the main switch to reduce the additional cost and size. To verify the performance of the proposed converter, a 100W converter has been designed. The proposed converter gives good power factor correction, low line current harmonic distortions, and tight output voltage regulation, as used unity power factor.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.4
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• pp.342-347
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• 2008

Bridge circuit was developed such that the pressure wave in the inkjet can be measured. In order to test the circuit, the microfab single ejector was used. For the experiment, the head was filled with nano silver ink (20wt%). In order to generate waveform voltage for jetting signal, the Agilent 33120 was used in order to generate arbitrary waveform. For the driver, PZD 350 from TREK was used in order to amplify the waveform. Experimental results show that the designed circuit can effectively detect the pressure wave in the inkjet head.