• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.5
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• pp.999-1003
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• 2009

We have designed and fabricated a linear drive amplifier with a novel intermodulation distortion(IMD) canceller using $0.18{\mu}m$ CMOS process. The drive amplifier with IMD canceller is composed of a cascode main amplifier and an additional common-source IMD canceller. Since the IMD canceller generates IM3($3^{rd}$-order imtermodulation) signal with $180^{\circ}$ phase difference against the IM3 of the cascode main amplifier, the IM3 power is drastically eliminated. As of the measurement results, $OP_{1dB}$, $OIP_3$, and power-add efficiency are 5.5 dBm, 15.5 dBm, and 21%, respectively. Those are 5 dB, 6 dB, and 13.5% enhanced values compared to a conventional cascode drive amplifier. The IMD3 of the drive amplifier with IMD canceller is enhanced more than 10 dB compared to that of the conventional cascode drive amplifier for input power ranges from -22 to -14 dBm.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.19 no.3
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• pp.135-140
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• 2019

In this paper, a frequency split type broadband drive amplifier operating in the L, S and C bands was designed and fabricated. Transistor is difficult to efficiently use when the fractional bandwidth of the drive amplifier is more than 100%, In particular, the characteristics of the driving amplifier are important for operating the power amplifier in which the characteristics of the output power and the efficiency are sensitively changed according to the frequency band. A frequency split methods was applied to maximize the bandwidth of a drive amplifier and to divide the output of the drive amplifier into low band and high band so that the transistor of the power amplifier located at the rear of the drive amplifier can be efficiently used. The designed drive amplifier was fabricated in GaAs HBT technology and 9-layer SiP, and verified by the measurements. The fabricated drive amplifier shows a gain of more than 8 dB and an output power of more than 15 dBm in the operating frequency range.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.8
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• pp.1572-1579
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• 2009

In this dissertation ultra-broadband power amplifier(UPA) was designed and fabricated using negative feedback technique. UPA was made of pre-amplifier, drive amplifier and power amplifier. Negative feedback technique was used to achieve ultra-broadband performance. Designed power amplifier has 30dB gain and 2W output power. The load-pull data of power amplifier for optimal power matching was extracted from the measured S-parameter. Fabricated PCB material, permittivity is 4.6 and thickness is 0.8mm, is FR4 and UPA was fabricated 3 modules for comparison of the simulated and measured results. Size of the fabricated pre-amplifier and drive amplifier module is 40mm'50mm'16mm. And from the experimental results, gain of the pre-amplifier module is 9.87dB at 2GHz and flatness is 0.63dB. Experimental result of the drive amplifier module is 10.97dB at 2GHz and flatness of that is 0.26dB. Test result of the power amplifier module is 10.71dB at 2GHz and flatness is 0.72dB. Total size of the power amplifier is 45mm'134mm'16mm. According to the test results, gain of the UPA is 28.98dB at 2GHz and flatness is 1.68dB. Output power was 32.098dBm at 2GHz, 32.154dBm at 1GHz and 31.273dBm at 100MHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.2
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• pp.125-131
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• 2002

This paper presents MMIC drive and power amplifiers covering 6-18 ㎓. For simple wideband impedance matching and less sensitivity to fabrication variation, modified distributed topologies are employed in the both amplifiers. Cascade amplifiers with a self-biasing circuit through feedback resistors are used as unit gain blocks in the drive amplifier, resulting in high gain, high stability, and compact chip size. Self impedance matching and high-pass, low-pass impedance matching networks are used in the power amplifier. In measured results, the drive amplifier showed good return losses ($S_11,{\;}S_{22}{\;}<{\;}-10.5{\;}dB$), gain flatness ($S_{21}={\;}16{\;}{\pm}0.6{\;}dB$), and $P_{1dB}{\;}>{\;}22{\;}dBm$ over 6-18 GHz. The power amplifier showed $P_{1dB}{\;}>{\;}28.8{\;}dBm$ and $P_{sat}{\;}{\approx}{\;}30.0{\;}dBm$ with good small signal characteristics ($S_{11}<-10{\;}dB,{\;}S_{22}{\;}<{\;}-6{\;}dB,{\;}and{\;}S_{21}={\;}18.5{\;}{\pm}{\;}1.25{\;}dB$) over 6-18 GHz.

• Journal of Korea Multimedia Society
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• v.20 no.9
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• pp.1551-1558
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• 2017

Audio power amplifiers have been designed based on the premise that the impedance of loudspeakers is fixed at nominal 4 ohms or 8 ohms. However, it is known that the impedance varies with frequency and takes on the nominal value at some limited frequencies. The principle of the loudspeaker operation reveals that the sound pressure produced by the loudspeaker is proportional to the current flowing in the voice coil, not the voltage between the two terminals. We take the characteristics of the loudspeaker into account and compare the frequency responses of the loudspeaker in voltage-drive mode and current-drive mode via computer simulations, to conclude that the audio amplifier drive mode should be re-considered in an effort to improve the sound quality.

• Journal of electromagnetic engineering and science
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• v.11 no.3
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• pp.161-165
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• 2011

In this paper, a high-efficiency DC-AC converter is used for wireless energy transmission. The DC-AC convertter is implemented by combining the oscillator and power amplifier. Given that the conversion efficiency of a DC-AC converter is strongly affected by the efficiency of the power amplifier, a high-efficiency power amplifier is implemented using a class-E amplifier structure. Also, because of the low output power of the oscillator connected to the input stage of the power amplifier, a high-gain two-stage power amplifier using a drive amplifier is used to realize a high-output power DC-AC converter. The high-efficiency DC-AC converter is realized by connecting the oscillator to the input stage of the high-gain high-efficiency two-stage class-E power amplifier. The output power and the conversion efficiency of the DC-AC converter are 40.83 dBm and 87.32 %, respectively, at an operation frequency of 13.56 MHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.9 s.112
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• pp.852-859
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• 2006

This paper suggests a developing approach of EHF TWTA for satellite communications. In order to improve RF performance and gain, we design and realize an EHF TWTA using a linearizer and drive amplifiers. Through the embodiment and experiment of 80 W EHF TWTA, this method satisfies the design specifications. Therefore, this approach is very useful and can be used to develop the similar equipments.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.8
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• pp.1847-1853
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• 2014

The PAPR of the input signal is increased due to OFDMA signal in a mobile communication system. High efficiency of a power amplifier, which accounts for power consumption, is a very important key technology. Digital Pre-Distortion techniques were used to improve the linearity of the power amplifier. The Asymmetric Doherty scheme was used to improve the efficiency of the power amplifier. In this paper, we propose a new structure of Asymmetric Doherty. Drive power amplifier part is separated as main path and peak path, and phase shifter is employed to improve power combine characteristics of the Doherty Amplifier. Also, envelope tracking technology for drive gate bais in drive peak amplifier is used to improve efficiency.

• Proceedings of the KAIS Fall Conference
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• 2010.11a
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• pp.76-79
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• 2010

본 논문에서는 고 효율 및 고 출력 특성을 가지는 질화갈륨(GaN) 소자를 이용하여 WiMAX 및 LTE System에 사용될 수 있는 DPD용 Pallet Amplifier를 제작하였다. 제작된 Pallet Amplifier는 Pre-drive로써 저 전류의 MMIC를 채택하고, Drive 단과 Main 단에 15W 급과 30W 급의 질화갈륨 소자를 사용 하였으며, 추가적인 효율 개선을 위해 PCB상에 Doherty Structure를 적용함으로써 보다 높은 효율을 구현하였다. 제작된 Pallet Amplifier는 음 전원 Bias 제어 회로, 온도에 따른 Gain 보상회로, Sequence 회로 및 Main 전원 Drop에 따른 보호 회로를 구현하였다. WiMAX Signal을 이용한 Modulation Power 10Watt Test에서 약 36.8~38.3%의 Pallet 효율과 DPD Solution인 TI GC5325SEK DPD Board 사용 시 ACLR은 약 46dBc 이상을 가지는 것으로 측정되었다. 본 논문에서 제작된 Pallet Amplifier는 Upper Band와 Lower Band로 나누어 제작되었던 기존 Pallet Amplifier와 달리 하나의 Pallet Amplifier로 2496~2690MHz에서 모두 사용하면서 종전에 사용되고 있는 Pallet Amplifier에 비해 Size가 최소 10% 이상 축소되어 효율 및 크기 면에서 종전 Pallet Amplifier보다 큰 이점을 갖는다.

• ETRI Journal
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• v.42 no.5
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• pp.773-780
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• 2020

A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.