• Electrical & Electronic Materials
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• v.8 no.5
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• pp.626-632
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• 1995

In this paper, The effect of the impedances in SNOSFET's memory devices has been developed. The effect of source and drain impedances measured by means of two bias resistances - field effect bias resistance by inner region, external bias resistance. The effect of the impedances by source and drain resistance shows the dependence of the function of voltages applied to the gate. It shows the differences of change in source drain voltage by means of low conductance state and high conductance state. It shows the delay of threshold voltages. The delay time of low conductance state and high conductance state by the impedances effect shows 3[.mu.sec] and 1[.mu.sec] respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.3
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• pp.206-209
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• 2006

This paper presents an analytical noise model for the drain thermal noise, the induced gate noise, and their correlation coefficient in deep-submicron MOSFETs, which is valid in both linear region and saturation region. The impedance field method was used to calculate the external drain thermal noise current. The effect of channel length modulation was included in the analytical equation. The noise behavior of MOSFETs with decreasing channel length was successfully predicted from our model.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.05a
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• pp.86-89
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• 1995

In this pacer, The effect of the impedances in SNOSEFT s memory devices has been developed. The effect of source and drain impedances are measuring using the method of the field effect bias resistance in the inner resistance regions of the device structure and external bias resistance. The effect of impedance by source and drain resistance shows according to increasing to the storage of memory charges, shows according to a function of decreasing to the gate voltages, shows the delay of threshold voltages, The delay time of low conductance state and high conductance state by the impedance effect shows 3 [${\mu}$sec] and 1[${\mu}$sec] respectively.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.5
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• pp.345-352
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• 2004

Currently, high data rate PLC(Power Line Communications), up to 100 Mbps, which use frequency bandwidth between 2 MHz and 30 MHz is investigated very hard, and commercial PLC modem for low voltage powerline network (indoor) is coming soon into communication market. For the purpose of developing a fit communication system which has little distortion of signal and attenuation, it is surely necessary to know about channel environments of powerline. Especially, the impedance measurement of the powerline and impedance matching are very important. As is known, since medium-voltage powerline (22.9 ㎸) is still working, it is not so simple to measure the powerline impedance. In our study, a portable impedance measurement equipment is developed. It consists of coupling capacitor, a drain coil and impedance matching transformer. The equipment is easily connected to medium voltage line and impedance of power line is measured using a network analyzer. Also, measurement results are used for impedance matching of PLC signal. In fact, matching transformer with several different impedances are used. The matching transformer is connected between coupling capacitor and signal port. In this paper, the developed portable impedance measurement equipment and impedance measurement results are presented. Also impedance matching technique using matching transformers will be explained. We showed the result of the improved performance by the impedance matching.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.6
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• pp.409-416
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• 2005

For broadband high-data-rate power line communication with the allocated frequency bandwidth from 2 to 30 MHz on medium voltage (MV) distribution power lines, a signal coupling unit is developed. The coupling unit is composed of a coupling capacitor for coupling communication signal, a drain coil, and an impedance matching part. The coupling capacitor made of ceramic capacitor is designed for transmission property of better than 1 dB in the frequency range. The drain coil is used for preventing low frequency high voltage from junction of medium voltage power line in case that a coupling capacitor is not working properly any more. Also, using ferrite core, a novel broadband impedance matching transformer is developed. A complete coupling unit with a coupling capacitor, a drain coil, and a matching transformer is housed by polymer for good isolation and distinguishing from high voltage electric facilities. Each is fabricated and its frequency behavior is tested. Finally, complete signal couplers are equipped in a MV PLC test bed and their performance are measured. The measurement shows that the coupling capacitor works excellently.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.60-63
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• 2003

This paper describes the design and the simulation of a V-band single pole double throw (SPDT) FET switch fur millimeter-wave applications using drain impedance transformation network with CPW transmission line. The designed switch has about 10% bandwidth at 60GHz. Insertion loss is better than 3dB fur the ON state and Isolation is larger than 30dB fer the OFF state. The maximum isolation is 43.4dB at 60GHz with input power of 10dBm. The yield analysis is done considering the effects of pHEMT variations.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.5
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• pp.663-671
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• 1999

The linearity of the GaAs FET power amplifier(PA) is greatly influenced by source and load impedance for the FETs. The third order intermodulation products, IM3, from the GaAs FET PA are investigated in relation with source and load impedance. From heuristic as well as analytic point of view, e.g., Volterra series analysis, is employed to analyze the effects of nonlinear circuit elements, gate-source capacitance, $C_{gs}$, and drain-source current, $I_{ds}$. The sweet spots where soure and load impedance produce the least intermodulation products are calculated and compared with the load and source pull data with good agreements. It also shows that source impedance has a greater effect on the intermodulation products than the load impedcnce.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.10 no.1
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• pp.42-48
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• 2011

In this paper, a passive load-pull using a GaN HEMT (Gallium Nitride High Electron Mobility Transistor) bare-chip in X-band is presented. To obtain operation conditions that characteristic change by self-heating was minimized, pulsed drain bias voltage and pulsed-RF signal is employed. An accuracy impedance matching circuits considered parasitic components such as wire-bonding effect at the boundary of the drain is accomplished through the use of a electro-magnetic simulation and a circuit simulation. The microstrip line length-tunable matching circuit is employed to adjust the impedance. The measured maximum output power and drain efficiency of the pulsed load-pull are 42.46 dBm and 58.7%, respectively, across the 8.5-9.2 GHz band.

• Journal of IKEEE
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• v.2 no.1 s.2
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• pp.15-23
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• 1998

In this paper, distributed mixer is studied at microwave frequency. The circuit of distributed mixer composed of gate 1,2, drain transmission lines, matching circuits in input and output terminal, DGFET's. For impedance matching of input and output port at higher frequency, image impedance concept is introduced. In distributed mixer, a DGFET's impedances are absorbed by artificial transmission line, this type of mixer can get a very broadband characteristics compared to that of current systems. A RF/LO signal is applied to each gate input port, and are excited the drain transmission line through transcondutance of the DGFET's. The output signals from each drain port of DGFET's added in same phases. We designed and frabricated the distributed mixer, and a conversion gain, noise figure, bandwidth, LO/RF isolation of the mixer are shown through computer simulation and experimentation.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.6
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• pp.52-61
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• 1996

In this paper, harmonic-tuning method to achieve the maximum efficiency is proposed. Harmonic tuning method is applied to the optimum load impedance of a class B amplifier, which is extracted by using the modified cripps method. High efficiency power amplifier utilizing GaAs MESFET is designed and fabricated in the 835MHz band. The performance of th eamplifier is presented by having output power of 30.8dBm, drain efficiency of 80.5% and power added efficiency of 66% with an associated power gain of 7.4dB.