• Title/Summary/Keyword: Drain engineering

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Device Optimization of N-Channel MOSFETs with Lateral Asymmetric Channel Doping Profiles

  • Baek, Ki-Ju;Kim, Jun-Kyu;Kim, Yeong-Seuk;Na, Kee-Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.1
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    • pp.15-19
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    • 2010
  • In this paper, we discuss design considerations for an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a lateral asymmetric channel (LAC) doping profile. We employed a $0.35\;{\mu}m$ standard complementary MOSFET process for fabrication of the devices. The gates to the LAC doping overlap lengths were 0.5, 1.0, and $1.5\;{\mu}m$. The drain current ($I_{ON}$), transconductance ($g_m$), substrate current ($i_{SUB}$), drain to source leakage current ($i_{OFF}$), and channel-hot-electron (CHE) reliability characteristics were taken into account for optimum device design. The LAC devices with shorter overlap lengths demonstrated improved $I_{ON}$ and $g_m$ characteristics. On the other hand, the LAC devices with longer overlap lengths demonstrated improved CHE degradation and $I_{OFF}$ characteristics.

The Characteristics on Infiltration of Fine-Grained Soil into Various Materials for Ground Drainage (지반 배수재에 따른 세립토의 관입특성)

  • Koh, Yongil
    • Journal of the Korean GEO-environmental Society
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    • v.16 no.11
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    • pp.39-43
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    • 2015
  • In this study, the infiltration quantity of fine-grained soil into coarse-grained soil or aggregate for methods to accelerate consolidation drainage is checked by laboratory tests under various conditions and those characteristics on infiltration are examined closely. Irrespectively of pressures to fine-grained soil corresponding to stresses in a soil mass or moisture contents of fine-grained soil, fine-grained soil does not infiltrate into standard sand and marine sand, so it is verified that drain-resistance into sand mass of drainage / pile does not occur entirely and its shear strength would increase highly by water compaction. It is known that the infiltration depth of fine-grained soil into aggregate increases according that those size is larger in case of aggregates and it increases according that the pressure or the moisture contents is higher in case of same size aggregate. It is thought that drain-resistance into aggregate mass of drainage / pile would occurs by infiltrated fine-grained soil in advance though the infiltration depth of fine-grained soi of lower moisture content than liquid limit into 13 mm aggregate is low quietly. So gravel drain method or gravel compaction pile method, etc. using aggregate of gravels or crushed stones, etc. larger than sand particle size should be not applied in very soft fine-grained soil mass of higher natural moisture contents than liquid limit, and it is thought that its applying is not nearly efficient also in soft fine-grained soil mass of lower natural moisture contents than liquid limit.

Analysis of Efficiency of Suction Board Drain Method by Step Vacuum Pressure (단계석션압 조건에 따른 석션보드드레인 공법의 효율 분석)

  • Kim, Ki-Nyun;Han, Sang-Jae;Kim, Soo-Sam
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.28 no.6C
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    • pp.321-329
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    • 2008
  • In this study, a series of column test as a way in order to make up for the weakness point of the conventional acceleration method were conducted to both propose the suction board drain method and grapes the specific improvement character of this method as a result of a sort of plastic drain board and a phase of vacuum pressure conditions. On this occasion, the study focused on computing the effective factors of the fittest Suction board drain method affected by each condition through confirming the settlement generated during the test, the water content reduction and stress increase effect occurred arising from the test, and the ratio of consolidation related to the improvement period. In accordance with the shape of core and that whether the core is attached to the filter(pocket or adhesion), the castle type of adhesion and the column type of pocket are more efficient than the others as a consequence of the test to find out the improvement effect depending on each drainage such as a castle type, coil type, harmonica type, column type of pocket and a castle of the adhesion. In case of the step suction pressure, the shorter the period of $-0.8\;kg/cm^2$ as a final step of the suction pressure is, the better the improvement is. In addition, the correlation between degree of consolidation per each suction pressure level and duration of application was drawn as a curve and the point of inflection on this curve was provided to determine the duration period to maximize the consolidation.

Self-aligned Offset Gated Poly-Si TFTs by Employing a Photo Resistor Reflow Process (Photo Resistor Reflow 방법을 이용한 오프셋 마스크를 이용하지 않는 새로운 자기 정합 폴리 실리콘 박막 트랜지스터)

  • Park, Cheol-Min;Min, Byung-Hyuk;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 1995.07c
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    • pp.1085-1087
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    • 1995
  • A large leakage current may be one of the critical issues for poly-silicon thin film transistors(poly-Si TFTs) for LCD applications. In order to reduce the leakage current of poly-Si TFTs, several offset gated structures have been reported. However, those devices, where the offset length in the source region is not same as that in the drain region, exhibit the asymmetric electrical performances such as the threshold voltage shift and the variation of the subthreshold slope. The different offset length is caused by the additional mask step for the conventional offset structures. Also the self-aligned implantation may not be applicable due to the mis-alignment problem. In this paper, we propose a new fabrication method for poly-Si TFTs with a self-aligned offset gated structure by employing a photo resistor reflow process. Compared with the conventional poly-Si TFTs, the device is consist of two gate electrodes, of which one is the entitled main gate where the gate bias is employed and the other is the entitled subgate which is separate from both sides of the main gate. The poly-Si channel layer below the offset oxide is protected from the injected ion impurities for the source/drain implantation and acts as an offset region of the proposed device. The key feature of our new device is the offset lesion due to the offset oxide. Our experimental results show that the offset region, due to the photo resistor reflow process, has been successfully obtained in order to fabricate the offset gated poly-Si TFTs. The advantages of the proposed device are that the offset length in the source region is the same as that in the drain region because of the self-aligned implantation and the proposed device does not require any additional mask process step.

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An Analytical Model for the I-V Characteristics of a Short Channel AlGaN/GaN HEMT with Piezoelectric and Spontaneous Polarizations (압전 및 자발 분극을 고려한 단채널 AlGaN/GaN HEMT의 전류-전압 특성에 관한 해석적 모델)

  • Oh Young-Hae;Ji Soon-Koo;Suh Chung-Ha
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.12
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    • pp.103-112
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    • 2005
  • In this paper, in order to derive the current-voltage characteristics of n-AlGaN/GaN HEMTs with the piezoelectric and spontaneous polarizations, we suggested analytical solutions for the two-dimensional Poisson equation in the AlGaN and GaN regions by taking into account the longitudinal field variation, field-dependent mobility, and the continuity condition of the channel current flowing in the quantum well. Obtained expressions for long and short channel devices would be applicable to the entire operating regions in a unified manner. Simulation results show that the drain saturation current increases and the cutoff voltage decreases as drain voltage increases. Compared with the conventional models, the present model seems to provide more reasonable explanation for the drain-induced threshold voltage roll-off and the channel length modulation effect.

Drain Induced Barrier Lowering(DIBL) SPICE Model for Sub-10 nm Low Doped Double Gate MOSFET (10 nm 이하 저도핑 DGMOSFET의 SPICE용 DIBL 모델)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.8
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    • pp.1465-1470
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    • 2017
  • In conventional MOSFETs, the silicon thickness is always larger than inversion layer, so that the drain induced barrier lowering (DIBL) is expressed as a function of oxide thickness and channel length regardless of silicon thickness. However, since the silicon thickness is fully depleted in the sub-10 nm low doped double gate (DG) MOSFET, the conventional SPICE model for DIBL is no longer available. Therefore, we propose a novel DIBL SPICE model for DGMOSFETs. In order to analyze this, a thermionic emission and the tunneling current was obtained by the potential and WKB approximation. As a result, it was found that the DIBL was proportional to the sum of the top and bottom oxide thicknesses and the square of the silicon thickness, and inversely proportional to the third power of the channel length. Particularly, static feedback coefficient of SPICE parameter can be used between 1 and 2 as a reasonable parameter.

Reliability Analysis for Optimization of Construction Method of Drain Material (배수재 시공의 최적화를 위한 신뢰성 해석)

  • Ahn, Hyeon-Min;Kim, Moon-Chae;Kim, Daehyeon
    • Journal of the Korean Geosynthetics Society
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    • v.13 no.4
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    • pp.87-96
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    • 2014
  • In this paper, reliability analysis was done on the characteristics of consolidation and settlement for the inner temporary dike where a weak ground improvement construction was applied. When the consolidation analysis on the foundation ground was done, the following conclusions were obtained by conducting the stability analysis on the effect of space of drains, the effect of consolidation time, and the residual settlement and differential settlement. When construction was done with a drain space which satisfied 95% probability of reaching a target consolidation in each divided area, the occurrence of a residual settlement was within the range, which did not exceed 10cm. It was shown that there was almost no possibility of the occurrence of differential settlement, which was above the permissible differential settlement slope.

Design and fabrication of SSPA module in Ku band for satellite terminals (Ku 대역 위성단말기용 SSPA 모듈 설계 및 제작)

  • Kim, Sun-il;Park, Sung-il
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.4
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    • pp.59-64
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    • 2016
  • In this paper, a 10W GaN MMIC was designed and fabricated using the Ku-band SSPA module. For Design and fabrication of the SSPA module using Rogers(RO4003C) substrate was used for Branch-line structure. SSPA modules on budget Divider/Combiner was designed and fabricated less than the maximum insertion loss - 0.7dB. In addition, because it must be applied to the structural nature of GaN MMIC Gate Bias-Drain Bias circuit was implemented to apply the Gate-Drain sequential circuit, implemented the RF Power Detect, Temperature Detect, HPA On/Off function. Design and fabrication Ku-band SSPA Module got the measurement results that satisfy a maximum output of 15.6W, Gain 45.7dB, 19.0% efficiency.

Simulation Design of MHEMT Power Devices with High Breakdown Voltages (고항복전압 MHEMT 전력소자 설계)

  • Son, Myung-Sik
    • Journal of the Korean Vacuum Society
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    • v.22 no.6
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    • pp.335-340
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    • 2013
  • This paper is for the simulation design to enhance the breakdown voltage of MHEMTs with an InP-etchstop layer. Gate-recess and channel structures has been simulated and analyzed for the breakdown of the MHEMT devices. The fully removed recess structure at the drain side of MHEMT shows that the breakdown voltage enhances from 2 V to almost 4 V as the saturation current at gate voltage of 0 V is reduced from 90 mA to 60 mA at drain voltage of 2 V. This is because the electron-captured negatively fixed charges at the drain-side interface between the InAlAs barrier and the $Si_3N_4$ passivation layers deplete the InGaAs channel layer more and thus decreases the electron current passing the channel layer and thus the impact ionization in the channel become smaller. In addition, the replaced InGaAs/InP composite channel with the same thickness in the same asymmetrically recessed structure increases the breakdown voltage to 5 V due to the smaller impact ionization and mobility of the InP layer at high drain voltage.

Improvement of Soft Marine Clay by Preloading and Wick Drain Method (선행하중과 Wick Drain공법에 의한 연약해성광토의 개량)

  • 유태성;박광준
    • Geotechnical Engineering
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    • v.3 no.1
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    • pp.7-24
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    • 1987
  • Preloading surcharge method along with vertical drains was adopted to improve the performance of a very soft marine clay deposit. The onshore deposit, located in the Ulsan Bay area, consists of a 2 to 10m thick, very soft, highly compressible marine clay layer developed just below. the sea water level. The initial undrained shear strength of the clay layer was about 0.6 ton/m2. But, the deposit was designed after treatment to support some auxiliary facilities for a new ilo refinery plant, requiring bearing capacities of 3.6 to 5.4 ton/m2 and maximum allowablee settlement of less than 7.5cm. A total of 35, 000 wick drains Ivas installed to expedite drainage during preloading, and surcharge loads of up to 5m above the original ground level were applied in a step-by-step loading sequence to prevent ground failure by excess surcharge loads. An extensive program of field instrumentation was implemented to monitor the behavior of the clay deposit. Measurers!ends included settlements, excess pore pressure and its dissipation, ground farmer level fluctuation, and lateral movement of the so(t clay layer under the preloads. This paper describes the design concepts, construction methods and control procedures used for improvement of the clay layer. It also presents the ground behavior measured during construction, rind comparisons with theoretical predictions.

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