• Title/Summary/Keyword: Drain current

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DC ∼ 45 GHz CPW Wideband Distributed Amplifier Using MHEMT (MHEMT를 이용한 DC ∼ 45 GHz CPW 광대역 분산 증폭기 설계 및 제작)

  • Jin Jin-Man;Lee Bok-Hyung;Lim Byeong-Ok;An Dan;Lee Mun-Kyo;Lee Sang-Jin;Ko Du-Hyun;Beak Yong Hyun;Oh Jung-Hun;Chae Yeon-Sik;Park Hyung-Moo;Kim Sam-Dong;Rhee Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.12
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    • pp.7-12
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    • 2004
  • In this paper, CPW wideband distributed amplifier was designed and fabricated using 0.1 $\mum$ InGaAs/InAlAs/GaAs Metamorphic HEMT(High Electron Mobility Transistor). The DC characteristics of MHEMT are 442 mA/mm of drain current density, 409 mS/mm of maximum transconductance. The current gain cut-off frequency(fT) is 140 GHz and the maximum oscillation frequency(fmax) is 447 GHz. The distributed amplifier was designed using 0.1 $\mum$ MHEMT and CPW technology. We designed the structure of CPW curve, tee and cross to analyze the discontinuity characteristics of the CPW line. The MIMIC circuit patterns were optimized electromagnetic field through momentum. The designed distributed amplifier was fabricated using our MIMIC standard process. The measured results show S21 gain of above 6 dB from DC to 45 GHz. Input reflection coefficient S11 of -10 dB, and output reflection coefficient S22 of -7 dB at 45 GHz, respectively. The chip size of the fabricated CPW distributed amplifier is 2.0 mm$\times$l.2 mm.

Studies on the Fabrication of 0.2 ${\mu}m$Wide-Head T-Gate PHEMT′s (0.2 ${\mu}m$ Wide-Head T-Gate PHEMT 제작에 관한 연구)

  • Jeon, Byeong-Cheol;Yun, Yong-Sun;Park, Hyeon-Chang;Park, Hyeong-Mu;Lee, Jin-Gu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.1
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    • pp.18-24
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    • 2002
  • n this paper, we have fabricated pseudomorphic high electron mobility transistors (PHEMT) with a 0.2 ${\mu}{\textrm}{m}$ wide-head T-shaped gate using electron beam lithography by a dose split method. To make the T-shape gate with gate length of 0.2 ${\mu}{\textrm}{m}$ and gate head size of 1.3 ${\mu}{\textrm}{m}$ we have used triple layer resist structure of PMMA/P(MMA-MAA)/PMMA. The DC characteristics of PHEMT, which has 0.2 ${\mu}{\textrm}{m}$ of gate length, 80 ${\mu}{\textrm}{m}$ of unit gate width and 4 gate fingers, are drain current density of 323 ㎃/mm and maximum transconductance 232 mS/mm at $V_{gs}$ = -1.2V and $V_{ds}$ = 3V. The RF characteristics of the same device are 2.91㏈ of S21 gain and 11.42㏈ of MAG at 40GHz. The current gain cut-off frequency is 63GHz and maximum oscillation frequency is 150GHz, respectively.ively.

High-performance 94 GHz Single Balanced Mixer Based On 70 nm MHEMT And DAML Technology (70 nm MHEMT와 DAML 기술을 이용한 우수한 성능의 94 GHz 단일 평형 혼합기)

  • Kim Sung-Chan;An Dan;Lim Byeong-Ok;Beak Tae-Jong;Shin Dong-Hoon;Rhee Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.4 s.346
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    • pp.8-15
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    • 2006
  • In this paper, the 94 GHz, low conversion loss, and high isolation single balanced mixer is designed and fabricated using GaAs-based metamorphic high electron mobility transistors (MHEMTs) with 70 nm gate length and the hybrid ring coupler with the micromachined transmission lines, dielectric-supported air-gapped microstrip lines (DAMLs). The 70 nm MHEMT devices exhibit DC characteristics with a drain current density of 607 mA/mm an extrinsic transconductance of 1015 mS/mm. The current gain cutoff frequency ($f_T$) and maximum oscillation frequency ($f_{max}$) are 320 GHz and 430 GHz, respectively. The fabricated hybrid ring coupler shows wideband characteristics of the coupling loss of $3.57{\pm}0.22dB$ and the transmission loss of $3.80{\pm}0.08dB$ in the measured frequency range of 85 GHz to 105 GHz. This mixer shows that the conversion loss and isolation characteristics are $2.5dB{\sim}>2.8dB$ and under -30 dB, respectively, in the range of $93.65GHz{\sim}94.25GHz$. At the center frequency of 94 GHz, this mixer shows the minimum conversion loss of 2.5 dB at a LO power of 6 dBm To our knowledge, these results are the best performances demonstrated from 94 GHz single balanced mixer utilizing GaAs-based HEMTs in terms of conversion loss as well as isolation characteristics.

High Gain and Broadband Millimeter-wave MHEMT Cascode Amplifier (고이득 및 광대역 특성의 밀리미터파 MHEMT Cascode 증폭기)

  • An, Dan;Lee, Bok-Hyung;Lim, Byeong-Ok;Lee, Mun-Kyo;Baek, Yong-Hyun;Chae, Yeon-Sik;Park, Hyung-Moo;Rhee, Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.8
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    • pp.105-111
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    • 2004
  • In this paper, millimeter-wave high gain and broadband MHEMT cascode amplifiers were designed and fabricated. The 0.1 ${\mu}{\textrm}{m}$ InGaAs/InAlAs/GaAs Metamorphic HEMT was fabricated for cascode amplifiers. The DC characteristics of MHEMT are 640 mA/mm of drain current density, 653 mS/mm of maximum transconductance. The current gain cut-off frequency(f$_{T}$) is 173 GHz and the maximum oscillation frequency(f$_{max}$) is 271 GHz. By using the CPW transmission line, the cascode amplifier was designed the matched circuit for getting the broadband characteristics. The designed amplifier was fabricated by the MHEMT MIMIC process that was developed through this research. As the results of measurement, the 1 stage amplifier obtained 3 dB bandwidth of 37 GHz between 31.3 to 68.3 GHz. Also, this amplifier represents the S21 gain with the average 9.7 dB gain in bandwidth and the maximum gain of 11.3 dB at 40 GHz. The 2 stage amplifier has the broadband characteristics with 3 dB bandwidth of 29.5 GHz in the frequency range from 32.5 to 62.0 GHz. The 2 stage cascode amplifier represents the high gain characteristics with the average gain of 20.4 dB in bandwidth and the maximum gain of 22.3 dB at 36.5 GHz.z.z.

a-Si:H TFT Using Ferroelectrics as a Gate Insulator (강유전체를 게이트 절연층으로 한 수소화 된 비정질실리콘 박막 트랜지스터)

  • 허창우;윤호군;류광렬
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.537-541
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    • 2003
  • The a-Si:H TFTs using ferroelectric of SrTiO$_3$, as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric is better than SiO$_2$, SiN. Ferroelectric increases ON-current, decreases threshold voltage of TFT and also breakdown characteristics. The a-Si:H deposited by PECVD shows absorption band peaks at wavenumber 2,000 $cm^{-1}$ /, 635 $cm^{-1}$ / and 876 $cm^{-1}$ / according to FTIR measurement. Wavenumber 2,000 $cm^{-1}$ /, 635 $cm^{-1}$ / are caused by stretching and rocking mode SiH1. The wavenumber of weaker band, 876 $cm^{-1}$ / is due to SiH$_2$ vibration mode. The a-SiN:H has optical bandgap of 2.61 eV, refractive index of 1.8 - 2.0 and resistivity of 10$^{11}$ - 10$^{15}$ aim respectively. Insulating characteristics of ferroelectric is excellent because dielectric constant of ferroelectric is about 60 - 100 and breakdown strength is over 1 MV/cm. TFT using ferroelectric has channel length of 8 - 20 $\mu$m and channel width of 80 - 200 $\mu$m. And it shows drain current of 3 $\mu$A at 20 gate voltages, Ion/Ioff ratio of 10$^{5}$ - 10$^{6}$ and Vth of 4 - 5 volts.

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Fabrication and characterization of $WSi_2$ nanocrystals memory device with $SiO_2$ / $HfO_2$ / $Al_2O_3$ tunnel layer

  • Lee, Hyo-Jun;Lee, Dong-Uk;Kim, Eun-Kyu;Son, Jung-Woo;Cho, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.134-134
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    • 2011
  • High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.

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Water Quality in Hwawon Coastal Sea of Korea for Rainy and Dry Season (건기와 우기시 화원면 주변 해역의 수질 비교)

  • Kim, Do-Hee
    • Journal of the Korean Society for Marine Environment & Energy
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    • v.10 no.4
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    • pp.193-200
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    • 2007
  • The purpose of this study is investigate to water quality, pH, turbidity, salinity, nutrients, SS, DO, COD, ${NH_4}^+$-N, ${NO_2}^-+{NO_3}^-$-N, TN, TP, ${PO_4}^{3-}$-P in ditches and seawater of the Hwawon, southwestern coastal area of Korea. Two stations of the ditch, one station at outfall from reservoir of the coastal development and 15 stations of seawater were measured in August just after a 96.5 mm rainfall and in dry season of November 2006. The sampling time were divided into a rainy and dry season based on turbidity, SS, salinity and nutrients difference of distributions that was evidence as a inflow of pollutants from the developing coastal land area. The pH, turbidity, salinity and SS were high and showed different from between surface and bottom in near the developing of coastal land than the other stations after a strong rainfall over 90 mm while it were not varied in vertical and horizontal concentration profile in dry season. The other nutrients were showed the same concentrations gradient patterns. In opposition to expectations, the SS in dry season was higher than in the rainy season due to upwelling by the wind and strong current. It appears that the researched coastal seawater qualities were mainly effected by the inflow of freshwater from the ditches and drain from the reservoir of the developing land area during strong rainfall while the seawater qualities were mainly effected by the wind and strong current in dry season.

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Highly Linear Wideband LNA Design Using Inductive Shunt Feedback (Inductive Shunt 피드백을 이용한 고선형성 광대역 저잡음 증폭기)

  • Jeonng, Nam Hwi;Cho, Choon Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1055-1063
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    • 2013
  • Low noise amplifiers(LNAs) are an integral component of RF receivers and are frequently required to operate at wide frequency bands for various wireless systems. For wideband operation, important performance metrics such as voltage gain, return loss, noise figures and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high input matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor between gate and drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this LNA is $0.202mm^2$, including pads. Measurement results illustrate that input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 7~8 dB over 1.5~13 GHz. In addition, good linearity(IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.

Simulation Study on a Quasi Fermi Energy Movement in the Floating Body Region of FITET (Field-induced Inter-band Tunneling Effect Transistor)

  • Song, Seung-Hwan;Kim, Kyung-Rok;Kang, Sang-Woo;Kim, Jin-Ho;Kang, Kwon-Chil;Shin, Hyung-Cheol;Lee, Jong-Duk;Park, Byung-Gook
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.679-682
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    • 2005
  • Negative-differential conductance (NDC) characteristics as well as negative-differential trans-conductance (NDT) characteristics have been observed in the room temperature I-V characteristics of Field-induced Inter-band Tunneling Effect Transistors (FITETs). These characteristics have been explained with inter-band tunneling physics, from which, inter-band tunneling current flows when the energy bands of degenerately doped regions align, and it does not flow when they don't. FITET is an SOI device and the body region is not directly connected to the external terminal. Therefore, Fermi energy in the body region is determined by electrical coupling among four regions - gate, source, drain and substrate. So, a quasi Fermi energy of the majority carriers in the floating body region can be changed by external voltages, and this causes the energy band movements in the body region, which determine whether the energy bands between degenerately doped junctions aligns or not. This is a key point for an explanation of NDT and NDC characteristics. In this paper, a quasi Fermi energy movement in the floating body region of FITET was investigated by a device simulation. This result was applied for the description of relation between quasi Fermi energy in the body region and external gate bias voltage.

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Characteristics of amorphous IZTO-based transparent thin film transistors (비정질 IZTO기반의 투명 박막 트렌지스터 특성)

  • Shin, Han-Jae;Lee, Keun-Young;Han, Dong-Cheul;Lee, Do-Kyung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.151-151
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    • 2009
  • Recently, there has been increasing interest in amorphous oxide semiconductors to find alternative materials for an amorphous silicon or organic semiconductor layer as a channel in thin film transistors(TFTs) for transparent electronic devices owing to their high mobility and low photo-sensitivity. The fabriction of amorphous oxide-based TFTs at room temperature on plastic substrates is a key technology to realize transparent flexible electronics. Amorphous oxides allows for controllable conductivity, which permits it to be used both as a transparent semiconductor or conductor, and so to be used both as active and source/drain layers in TFTs. One of the materials that is being responsible for this revolution in the electronics is indium-zinc-tin oxide(IZTO). Since this is relatively new material, it is important to study the properties of room-temperature deposited IZTO thin films and exploration in a possible integration of the material in flexible TFT devices. In this research, we deposited IZTO thin films on polyethylene naphthalate substrate at room temperature by using magnetron sputtering system and investigated their properties. Furthermore, we revealed the fabrication and characteristics of top-gate-type transparent TFTs with IZTO layers, seen in Fig. 1. The experimental results show that by varying the oxygen flow rate during deposition, it can be prepared the IZTO thin films of two-types; One a conductive film that exhibits a resistivity of $2\times10^{-4}$ ohm${\cdot}$cm; the other, semiconductor film with a resistivity of 9 ohm${\cdot}$cm. The TFT devices with IZTO layers are optically transparent in visible region and operate in enhancement mode. The threshold voltage, field effect mobility, on-off current ratio, and sub-threshold slope of the TFT are -0.5 V, $7.2\;cm^2/Vs$, $\sim10^7$ and 0.2 V/decade, respectively. These results will contribute to applications of select TFT to transparent flexible electronics.

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