• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.12
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• pp.1764-1770
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• 2013

Use of the 5.1 channel audio signals suitable for the television system is improper for the radio broadcasting system, which uses the stereo audio system. Therefore, it is necessary to develop an audio down-mixer to convert 5.1 multi-channel audio signals to stereo signals for radio broadcasting. In this paper, a development of an audio down-mixer was carried out to convert 5.1 multi-channel audio signals to stereo signals. The down-mixer which was developed can use the audio signals separated from video signals, including sound signals or individual signals provided from 3-channel AES/EBU signals including Left(L), Right(R), Left Surround(Ls), Right Surround(Rs), Center(C) and Low Frequency Effect(Lfe) sounds as mixer inputs.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.2 s.93
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• pp.139-143
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• 2005

In this paper, we propose the design on LNA and Down-mixer for MB-OFDM UWB using $0.18\;{\mu}m$ CMOS. LNA, Down-mixer design result shows that it covers the frequency range ken 3 GHz to 5 GHz. The LNA gain is larger than 12.8 dB, and noise figure about 2.6 dB. Double balanced differential down-mixer is designed less than 2 dB gainflatness, and it has over 30 dB LO leakage, feedthrough characteristics.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.8 s.111
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• pp.719-724
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• 2006

In this paper, we designed the double conversion down mixer by using Half-LO frequency in 2.3 GHz band. The IF frequency is obtained by supplying two LO frequencies to HEMT in both gate type and resistive type. The proposed mixer uses Half-LO frequency the same way as conventional sub-harmonic mixers. However the proposed one uses fundamental component of Half-LO frequency in first stage instead of using second harmonic components of Half-LO frequency, and the IF frequency is obtained by resistive type mixer in second stage, thereby the proposed mixer can improve linearity in comparison with conventional active mixer. We can verify that the proposed mixer has an conversion loss of 5dBm and IIP3 of 16.25dBm by using 10 dBm Power.

• ETRI Journal
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• v.32 no.3
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• pp.457-459
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• 2010

A low-power down-sampling mixer in a low-power digital 65 nm CMOS technology is presented. The mixer consumes only 830 ${\mu}W$ at 1.2 V supply voltage by combining an NMOS and a PMOS mixer with cascade transistors at the output. The measured gain is (19 ${\pm}$1 dB) at frequencies between 100 MHz and 3 GHz. An IIP3 of -5.9 dBm is achieved.

• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.61-64
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• 2000

This paper describes a RF Down-Conversion Mixer for mobile communication systems. This circuit achieves low voltage operation and low power consumption by reducing stacked devices of conventional gilbert cell mixer. In order to reduce stacked devices, we use source-follower structure. The proposed RF Down-Conversion mixer operates up to 1.85GHz at 1.5V power supply with 0.25um CMOS technology and consumes 2.2mA.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.193-196
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• 2001

To reduce third-order intermodulation distortion(IMD3) generated in the down-conversion process of the mixer, predistortion technique was proposed and its performance was verified fDr Cellular band circuit. This method is based on the fact that down converted IMD3 of a down conversion mixer could be canceled by that of predistortor with a fine tuned vector modulator. Two tone test has been performed at 836 Mhz with 442 KHz separation. The results showed that IM3 level was improved about 16dB and PldB of the mixer was increased 3dB. from the above results, the suggested technique is useful to design the down converters for communication system .

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.8
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• pp.764-768
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• 2002

In this paper, a double balanced gilbert cell MMIC mixer was realized in Tachyonics SiGe HBT technology. The fabricated mixer has 17 dB conversion gain, 9.8 dB noise figure, -4.2 dBm output 1 dB compression point, -27 dBc RF to IF isolation, and the good input, output matching characteristics. It draws 10 mA from a 3 V supply. The simulation and the measured results are closer to each other, which confirms accuracy of the model library and reliability of the process.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.10 s.352
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• pp.97-103
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• 2006

This paper presents the method of improving second order intermodulation distortion(IMD2) and dc-offset problems in down-conversion mixer. A simple analysis reveals the IMD2 and dc-offset can be eliminated by controlling the duty cycles of local oscillator(LO) inputs. A mixer with the proposed method has been simulated with a $0.13{\mu}m$ RF CMOS technology with 5% mismatch in the load resistance, the mixer shows 2.04dBm IIP2 and 22mnV input referred DC-offset. By controlling two duty cycles of LO inputs, IIP2 and DC-offset can be improved to 38.8dBm and $777{\mu}V$, respectively.

• ETRI Journal
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• v.27 no.5
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• pp.569-578
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• 2005

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on-chip 1 to 6 GHz up-conversion and 1 to 8 GHz down-conversion mixers using a 0.8 mm SiGe hetero-junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up-conversion mixer was implemented on-chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up-conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down-conversion mixer was implemented on-chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down-conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.2
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• pp.147-155
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• 2002

This paper describes RF front-end transceiver chipset for the dual-mode operation of PCS-Korea and IMT-2000. The transceiver chipset has been implemented in a $0.25\mutextrm{m}$ single-poly five-metal CMOS technology. The receiver IC consists of a LNA and a down-mixer, and the transmitter IC integrates an up-mixer. Measurements show that the transceiver chipset covers the wide RF range from 1.8GHz for PCS-Korea to 2.1GHz for IMT-2000. The LNA has 2.8~3.1dB NF, 14~13dB gain and 5~4dBm IIP3. The down mixer has 15.5~16.0dB NF, 15~13dB power conversion gain and 2~0dBm IIP3. The up mixer has 0~2dB power conversion gain and 6~3dBm OIP3. With a single 3.0V power supply, the LNA, down-mixer, and up-mixer consume 6mA, 30mA, and 25mA, respectively.