• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.27 no.4C
• /
• pp.380-387
• /
• 2002

In this paper, the effect of the phase noise of a local oscillator on the ACPR of a transmitter and the reception sensitivity of a receiver to meet the TIA/EIA/IS-98-D for the CDMA mobile station was analyzed. And the optimum condition for performance of the local oscillator was suggested. It was found that the phase noise level of the local oscillator in a receiver and a transmitter should be below -138.3dBc/Hz and -120dBc/Hz, respectively, at 900kHz offset. It was confirmed that the reception sensitivity and ACPR efficiency were satisfactory when the signal of the local oscillator to the down-converter of a receiver with the phase noise level of less than -138.3dBc/Hz is supplied to the up-converter of the transmitter.

• The KSFM Journal of Fluid Machinery
• /
• v.18 no.3
• /
• pp.5-11
• /
• 2015

Ocean waves have huge amounts of energy, even larger than wind or solar, which can be extracted by some mechanical device. This can be done by creating a system of reacting forces, in which two or more bodies move relative to each other, while at least one body interacts with the waves. This moves the floater up and down. The floaters are connected to an arm structure, which are mounted on a fixed hull structure. Hence, the structure of the floater is very important. A static structural analysis with FSI (Fluid-Structure Interaction) analysis is conducted. To achieve the pressure load for the FSI analysis, the floater is simulated on a wave generator using rigid body motion. The structural analysis is done to examine the stresses on the whole system, and four types of flange and floater are optimized. The result shows that the structure of floater with wood support is the safest.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.10 no.5
• /
• pp.942-946
• /
• 2009

A scan order converter has to be placed before the JPEG encoder to provide $8{\times}8$ blocks from the pixels in raster scan order. Recently a hardware architecture has been proposed to implement a scan converter based on the single line memory. Since both read and write accesses happen at each cycle, however, the largest part of the entire power budget is occupied by the SRAM itself. In this paper, the data packing and unpacking procedure is inserted in the processing chain, such that the access frequency to the SRAM is reduced to 1/8 by adopting a packed larger data unit. The simulation results show that the resultant power consumption is reduced down to 16% for the SXGA resolution.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.22 no.2
• /
• pp.258-264
• /
• 2011

In this paper, we designed a frequency synthesizer with a low phase noise and fast lock time and excellent spurious characteristics using the offset-PLL(Phase Locked Loop) that is used in GSM(Global System for Mobile communications). The proposed frequency synthesizer has low phase noise using three times down conversion and third offset frequency of this synthesizer is created by DDS(Direct Digital Synthesizer) to have high frequency resolution. Also, this synthesizer has fast switching speed using DAC(Digital to Analog Converter). but phase noise degraded due to DAC. we improved performance using the DAC noise filter.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.13 no.5
• /
• pp.403-411
• /
• 2020

Since the analog circuit of the beta ray sensor circuit for the true random number generator and the power and ground line used in the comparator circuit are shared with each other, the power generated by the digital switching of the comparator circuit and the voltage drop at the ground line was the cause of the decreasein the output signal voltage drop at the analog circuit including CSA (Charge Sensitive Amplifier). Therefore, in this paper, the output signal voltage of the analog circuit including the CSAcircuit is reduced by separating the power and ground line used in the comparator circuit, which is the source of digital switching noise, from the power and ground line of the analog circuit. In addition, in the voltage-to-voltage converter circuit that converts VREF (=1.195V) voltage to VREF_VCOM and VREF_VTHR voltage, there was a problem that the VREF_VCOM and VREF_VTHR voltages decrease because the driving current flowing through each current mirror varies due to channel length modulation effect at a high voltage VDD of 5.5V when the drain voltage of the PMOS current mirror is different when driving the IREF through the PMOS current mirror. Therefore, in this paper, since the PMOS diode is added to the PMOS current mirror of the voltage-to-voltage converter circuit, the voltages of VREF_VCOM and VREF_VTHR do not go down at a high voltage of 5.5V.

• Journal of Korean Society of Coastal and Ocean Engineers
• /
• v.34 no.1
• /
• pp.1-10
• /
• 2022

In this study, the two horizontal shroud tidal current energy converter, which can generate power even under low flow speed conditions, was developed. In order to determine the shape of the shroud system, a three-dimensional numerical simulation test was conducted, and a 1/6 scale down model was made to perform a hydraulic model experiment. The hydraulic model experiment was performed under four flow conditions, and the flow speed, torque, and RPM were measured for each experimental case. As a result of the numerical simulation test, it was found that the flow speeds passing through the nozzle were increased by about 2~3 times in the cylinder, and when the extension ratio was 2:1, the highest flow speed was shown. In addition, it was found that the flow speeds increased 2.8 times when the diameter ratio between the nozzle and the cylinder was 1.5:1. Meanwhile, as a result of the hydraulic model experiment, it was found that when the tip speed ratio was between 1.75 and 2, the power coefficient was 0.32 to 0.34.

• Korean Journal of Optics and Photonics
• /
• v.13 no.1
• /
• pp.15-20
• /
• 2002

We demonstrate a widely-tunable wavelength converter based on four-wave mixing in a semiconductor-fiber ring laser with no external pump light. Applying 10 GHz short pulses at -8 dBm as a probe signal, we achieve continuous wavelength tuning over the semiconductor optical amplifier gain-bandwidth reaching 30 nm down- and 17 m up-wavelength conversion. In addition to the wide tuning capability, the converter shows high-speed conversion and low saturation power capabilities.

• Transactions of the Korean Society of Automotive Engineers
• /
• v.12 no.3
• /
• pp.101-108
• /
• 2004

A FEM-based efficient method is developed for the shape optimization of 2-D structures. The combined SLP and Simplex method are coupled with finite element analysis. Selected set of master nodes on the design boundaries are employed as design variables and assigned to move towards their normal directions. The other nodes along the design boundaries are grouped into the master node. By interpolating the repositioned master nodes, the B-spline curves are formed so that the rest mid-nodes efficiently settle down on the B-spline curves. Mesh smoothing scheme is also applied for the nodes on the design boundary to maintain most finite elements in good quality. Finally, a numerical implementation of optimum design of an automobile torque converter piston subjected to pressure and centrifugal loads is presented. The results shows additional weight up to 13% may be saved after the shape optimization.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.12 no.6
• /
• pp.433-440
• /
• 2007

Recently, the reduction of standby power consumption is significantly issued in electronic and electrical industry for the conservation of environment. In the case of a switched mode power supply (SMPS), it is demanded high efficiency at extremely low output power conditions by consumers. However, it is very different from high efficiency techniques at full load conditions. In addition, many SMPSs are designed as a multi-output circuit for various loads because of cost down. This circuit is difficult to implement both high efficiency and good cross regulation performance, simultaneously. In this paper, secondary side post regulator (SSPR), current mode control method, and power sequence control technique are proposed to reduce standby power consumption and to improve cross regulation performance of the multi-output SMPSs which consist of single or multiple converter. The proposed methods are analyzed by their operational principles and optimal designs verified by experimental results with 110[W] and 270[W] SMPSs.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.9
• /
• pp.1-7
• /
• 2008

This paper proposes 3.3V input and 1.8V output voltage mode step-down DC-DC buck converter for wireless mobile system which is designed in a standard 0.35$\mu$m CMOS process. The proposed capacitor multiplier method can minimize error amplifier compensation block size by 30%. It allows the compensation block of DC-DC converter be easily integrated on a chip. Also, we improve efficiency to 3% using low power buffer. Measurement result shows that the circuit has less than 1.17% output ripple voltage and maximum 83.9% power efficiency.