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http://dx.doi.org/10.17661/jkiiect.2020.13.5.403

A Study on the Design of a Beta Ray Sensor Reducing Digital Switching Noise  

Kim, Young-Hee (Department of Electronic Engineering, Changwon National University)
Jin, Hong-Zhou (Department of Electronic Engineering, Changwon National University)
Cha, Jin-Sol (Department of Electronic Engineering, Changwon National University)
Hwang, Chang-Yoon (Department of Smart Manufacturing Engineering, Changwon National University)
Lee, Dong-Hyeon (Department of Smart Manufacturing Engineering, Changwon National University)
Salman, R.M. (Department of Electronic Engineering, Changwon National University)
Park, Kyung-Hwan (Electronics and Telecommunications Research Institute)
Kim, Jong-Bum (Korea Atomic Energy Research Institute)
Ha, Pan-Bong (Department of Electronic Engineering, Changwon National University)
Publication Information
The Journal of Korea Institute of Information, Electronics, and Communication Technology / v.13, no.5, 2020 , pp. 403-411 More about this Journal
Abstract
Since the analog circuit of the beta ray sensor circuit for the true random number generator and the power and ground line used in the comparator circuit are shared with each other, the power generated by the digital switching of the comparator circuit and the voltage drop at the ground line was the cause of the decreasein the output signal voltage drop at the analog circuit including CSA (Charge Sensitive Amplifier). Therefore, in this paper, the output signal voltage of the analog circuit including the CSAcircuit is reduced by separating the power and ground line used in the comparator circuit, which is the source of digital switching noise, from the power and ground line of the analog circuit. In addition, in the voltage-to-voltage converter circuit that converts VREF (=1.195V) voltage to VREF_VCOM and VREF_VTHR voltage, there was a problem that the VREF_VCOM and VREF_VTHR voltages decrease because the driving current flowing through each current mirror varies due to channel length modulation effect at a high voltage VDD of 5.5V when the drain voltage of the PMOS current mirror is different when driving the IREF through the PMOS current mirror. Therefore, in this paper, since the PMOS diode is added to the PMOS current mirror of the voltage-to-voltage converter circuit, the voltages of VREF_VCOM and VREF_VTHR do not go down at a high voltage of 5.5V.
Keywords
beta ray sensor; Charge Sensitive Amplifier; Digital Switching Noise; true random number generator; Voltage-to-Voltage Converter;
Citations & Related Records
Times Cited By KSCI : 4  (Citation Analysis)
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