• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2004년도 춘계학술대회 논문집
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• pp.104-109
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• 2004

Recently, when electric traction system used DC 1500[Vdc] runs on decline of rail road track and slows down, dc voltage goes beyond regular voltage. In this case extra power is forcibly wasted by resister because rectifier of substation and electric train including power converter and so on are out of order. Therefore this paper proposes that the extra power is regenerated through regeneration inverter to AC utility in result this system obstruct to go beyond regular voltage and improve the efficiency. In addition, electric traction system products harmonic current and voltage distortion and reactive power because power converter is used so regeneration inverter normally runs such as active power filter(APF) for improving power quality.

• 전력전자학회논문지
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• 제18권5호
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• pp.413-421
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• 2013

This paper proposes residential hybrid distribution system that can supply AC power and DC power to AC load and DC load at the same time. This hybrid distribution system consists of three parts: bidirectional inverter, step-up converter and step-down converter. Also that is used to supply voltage to home application is classified of AC load and DC load as load characteristics. The performance of proposed hybrid distribution system is validated through the hardware implementation and the experimental results.

• 오토저널
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• 제13권6호
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• pp.109-118
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• 1991

In this study, it is intended to investigate the effect of the grinding conditions such as table feed, down feed, cross feed of residual stress distribution. And this distribution is investigated upon the grinding direction and the its orthogonal direction at ground layers. The material is used carbon steel (SM20C) which usually used to motor axis. And in order to be considered as Bernoulli-Euler beam, the dimension of the specimen is appropriately designed. According as corroiding the ground surface, the residual stress layers are removed and strain which occured on account of unbalance of internal stress is detected by rosette-gate. Through A/D converter and computer, these values are saved and evaluated residual stress by stress-strain relation formula. Finally, these results are diagrammatized with Auto Cad. The results obtained are as follows. As the depth from the ground surface increases in grinding direction and its orthogonal direction, tensile residual stress exists in the surface, and subsequently it becomes compressive residual stress as it goes downward. As the table feed, the cross feed and the down feed increase, maximum residual stress is transformed form the tensile to the compressive.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2002년도 종합학술발표회 논문집 Vol.12 No.1
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• pp.69-73
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• 2002

We have designed and fabricated a low-cost, V-band CPW receiver chip set using GaAs PHEMT technology for the application of millimeter-wave wireless communication systems. Low noise amplifiers and down-converters were developed for this chip set. The fabricated low noise amplifier showed an S$\sub$21/ gain of 14.9 ㏈ at 60 ㎓ and a noise figure of 4.1 ㏈ at 52 ㎓. The down-converter exhibited a high conversion gain of 2 ㏈ at the low LO Power of 0 ㏈m. This work demonstrates that the GaAs PHEMT technology is a viable low-cost solution for V-band applications.

• ETRI Journal
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• 제46권2호
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• pp.238-249
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• 2024

Equivalent-time sampling can improve measurement or sensing systems because it enables a broader frequency band and higher delay resolution for periodic signals with lower sampling rates than a Nyquist receiver. Meanwhile, a digital down-conversion (DDC) technique can be implemented using a straightforward radio frequency (RF) circuit. It avoids timing skew and in-phase/quadrature gain imbalance instead of requiring a high-speed analog-to-digital converter to sample an intermediate frequency (IF) signal. Therefore, when equivalent-time sampling and DDC techniques are combined, a significant synergy can be achieved. This study provides a parameter design methodology for optimal equivalent-time sampling using DDC.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 전력전자학술대회
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• pp.340-341
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• 2011

본 논문에서는 높은 승 강압비를 갖는 양방향 DC-DC 컨버터에 대한 최적의 스위칭 기법을 제안한다. 제안한 컨버터는 CCM에서도 소프트 스위칭이 가능하여 스위칭 손실뿐만 아니라 인덕터의 발열도 줄일 수 있다. 또한 모든 소자의 전압 정격과 수동소자의 부피도 기존 양방향 컨버터 보다 작아 고효율 및 고전력밀도의 달성을 기대 할 수 있다. 1.5kW 시작품의 실험을 통해 본 논문의 타당성을 검증하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2012년도 추계학술대회 논문집
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• pp.121-122
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• 2012

저궤도 인공위성의 전력변환 시스템은 태양전지판에서 생성된 전력을 배터리와 전장품으로 구성된 비조절형 버스로 전압 강하하여 제공한다. 무게, 부피, EMI/EMC 특성에 제한적인 요구조건을 갖는 인공위성의 응용분야에 적용하기 위하여 설계된 강압형 DC/DC 컨버터는 기존의 벅-컨버터와 유사한 동작특성을 보이지만 인턱터를 분리함으로써 입력단에도 연속적인 전류특성을 보이며 두 개로 분리된 인턱터는 부피와 무게에서 이점을 갖추고 있다. 본 논문에서는 연속적인 입출력 전류 특성을 갖는 강압형 컨버터의 동작특성에 대하여 기술한다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.181-182
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• 2008

In this paper, an cost-effective system architecture is proposed to implement digital predistortion scheme for linearizing the PA amplifing TDD wideband signal. To make digital predistorted signal for compensating nonlinearity of PA, a dedicated ADC and a frequency-down converter are necessary. Proposed scheme is based on the TDD feature that the RF receiver frontend is idle state during the downlink signal processing time and utilize them to make the digital predistorted signal for PA.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.817-820
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• 1999

In this paper, we describes RF receiver module for IMT-2000 handset with 5MHz channel bandwidth. The fabricated RF receiver module consists of Low Noise Amplifier-, RF SAW filter, Down-converter, IF SAW filter, AGC and PLL Synthesizer. The NF and IIP3 of LNA is 0.8㏈, 3㏈m at 2.14㎓, conversion gain of downconverter is l0㏈, dynamic range of AGC is 80㏈, and phase noise of PLL is -100 ㏈m, at 100KHz. The receiver sensitivity is -110㏈m, adjacent channel selectivity is -48㏈m.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2001년도 종합학술발표회 논문집 Vol.11 No.1
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• pp.44-48
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• 2001

In this paper we describe the design of symbol timing and carrier synchronization algorithms for burst receiver. The demodulator consists of digital down converter, matched filter and synchronization circuits. For symbol timing recovery we use modified Gardner algorithm. And we use decision directed method for carrier phase recovery. For the sake of performance analysis, we compare simulation results with the board implemented by FPGA which is APEX20KE series chip for Alter. The performance results show it works quite well up to the condition that a frequency offset equal to 0.1% of symbol rate.