• Journal of the Korea Society of Computer and Information
• /
• v.7 no.4
• /
• pp.115-120
• /
• 2002

This paper presents the implementation of IS-95 CDMA signal processor, baseband and Intermediate Frequency(IF) digital converter using Field Programmable Gate Array(FPGA) and ADC/DAC and frequency up/down converter IS-95 CDMA channel processor is generated the pilot channel signal with short PN code and Walsh-code generator. The digital If is composed of FPGA. digital transmit/receive signal processor and high speed analog-to-digital converter(ADC) and digital-to-analog converter(DAC). The frequency up/down converter consisted of filter, mixer, digital attenuator and PLL is analog conversion between intermediate frequency(IF) and baseband. This implemented system can be deployed in the IS-95 CDMA base station device etc.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.10 no.1
• /
• pp.55-60
• /
• 2010

For battery-powered device applications, which grow rapidly in the electronic market today, low-power becomes one of the most important design issues of CMOS VLSI circuits. A multi-VDD system, which uses more than one power-supply voltage in the same system, is an effective way to reduce the power consumption without degrading operating speed. However, in the multi-VDD system, level converters should be inserted to prevent a large static current flow for the low-to-high conversion. The insertion of the level converters induces the overheads of power consumption, delay, and area. In this paper, we propose a new level converter which can provide the level up/down conversions for the various input and output voltages. Since the proposed level converter uses only one power-supply voltage, it has an advantage of reducing the complexity in physical design. In addition, the proposed level converter provides lower power and higher speed, compared to existing level converters.

• Journal of IKEEE
• /
• v.23 no.1
• /
• pp.68-73
• /
• 2019

This paper presents a novel fast shut-down scheme for Buck converter by using a coupled inductor. Generally, a controller for Buck converter stops generating PWM patterns in various fault cases: Overcurrent, Short circuit, or Overvoltage, but the inductor and capacitor keep supplying their stored energy to loads although the switching operations in Buck converter stopped. The stored energy in the inductor and capacitor could cause electrical stresses on breakers and safety problems. The main idea of the proposed fast shutdown scheme is to demagnetize the inductor core by using a coupled inductor, and its performance and operations are verified by using PSIM Simulation.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.58 no.1
• /
• pp.14-17
• /
• 2009

In this paper, A generator of existing vertical type wind turbine system is connected to bevel gear. But, the generator of proposed wind turbine system is connected to Hydraulic torque converter. In case of the proposed wind turbine system, is possible to make torque transmission long distance, set up generator somewhere in between the tower or the ground as well as, nacelle weight can be greatly down. Lightweight of nacelle exactly wind direction tracking can be easily also, cost down of established frame structure and generator setting, maintenance, easy and improvement of system stability.

• Journal of electromagnetic engineering and science
• /
• v.9 no.2
• /
• pp.98-104
• /
• 2009

An InGaP/GaAs MMIC LC VCO designed with Harmonic Noise Frequency Filtering(HNFF) technique is presented. In this VCO, internal inductance is found to lower the phase noise, based on an analytic understanding of phase noise. This VCO directly drives the on-chip double balanced mixer to convert RF carrier to IF frequency through local oscillator. Furthermore, final power performance is improved by output amplifier. This paper presents the design for a 1.721 GHz enhanced LC VCO, high power double balance mixer, and output amplifier that have been designed to optimize low phase noise and high output power. The presented asymmetric inductance tank(AIT) VCO exhibited a phase noise of -133.96 dBc/Hz at 1 MHz offset and a tuning range from 1.46 GHz to 1.721 GHz. In measurement, on-chip down-converter shows a third-order input intercept point(IIP3) of 12.55 dBm, a third-order output intercept point(OIP3) of 21.45 dBm, an RF return loss of -31 dB, and an IF return loss of -26 dB. The RF-IF isolation is -57 dB. Also, a conversion gain is 8.9 dB through output amplifier. The total on-chip down-converter is implanted in 2.56${\times}$1.07 mm$^2$ of chip area.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.4 no.4
• /
• pp.264-271
• /
• 2011

ILS(Instrument Landing System) is the international standard system for approach and landing guidance. ILS was adopted by ICAO(International Civil Aviation Organization) in 1947 and is currently being used in commercial systems. To design the digital transmitter and receiver modules that can be mounted in the integrated ILS, we propose the digital design methods of digital double AM modulator and demodulator using FPGA chip, DDS(Direct Digital Synthesizer) for generation of sampling clock, demodulator of DDC(Digital Down Converter) structure, and spectrum analyzer using DSP chip. We demonstrate the efficiency of the proposed design method through experiments using developed transmitter and receiver modules. This system can be used as a high-performance commercial system.

• Journal of Electrical Engineering and Technology
• /
• v.5 no.3
• /
• pp.477-483
• /
• 2010

This paper is studied on a novel buck-boost isolated converter for high efficiency and high power factor. The switching devices in the proposed converter are operated by soft switching technique using a new quasi-resonant circuit, and are driven with discontinuous conduction mode (DCM) according to pulse width modulation (PWM). The quasi-resonant circuit makes use of a step up-down inductor and a loss-less snubber capacitor. The proposed converter with DCM also simplifies the requirement of control circuit and reduces a number of control components. The input ac current waveform in the proposed converter becomes a quasi sinusoidal waveform in proportion to the magnitude of input ac voltage under constant switching frequency. As a result, it is obtained by the proposed converter that the switching power losses are low, the efficiency of the converter is high, and the input power factor is nearly unity. The validity of analytical results is confirmed by some simulation results on computer and experimental results.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.64 no.3
• /
• pp.433-437
• /
• 2015

We have designed and fabricated a low power and high linearity up down convertor for wireless repeaters using $0.35{\mu}m$ SiGe Bipolar CMOS technology. Repeater is composed of a wideband up/down converting mixer, programmable gain amplifiers (PGA), input buffer, LO buffer, filter driver amplifier and integer-N phase locked loop (PLL). As of the measurement results, OIP3 of the down conversion mixer and up conversion mixer are 32 dBm and 17.8 dBm, respectively. The total dynamic gain range is 31 dB with 1 dB gain step resolution. The adjacent channel leakage ratio (ACLR) is 59.9 dBc. The total power consumption is 240 mA at 3.3 V.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2006.05a
• /
• pp.961-965
• /
• 2006

Design Up/Down converters which use Digital IF( Intermediate Frequency) techniques from the present paper, against hereupon performance the criticism. The reason which uses Digital IF techniques is configured of passive elements and the position If frequency domains are fixed and they do not use in the position one frequency but, the external fringe land of the board which comes to be configured with Digital IF without from the communication frequency domain which is various there to be a flexibility, the use was under possibility. Like this configuration compares in analog Heterodyne mode of existing and it has the performance upgrade which is excellent it shows a high flexibility.

• Proceedings of the IEEK Conference
• /
• 2004.06a
• /
• pp.201-204
• /
• 2004

In this paper, a down-converter that can work for L-band RF front-end of DMB receiver is designed. Since DRK-02, a reference for our work, had been designed for a stationary receiver, not for mobile one, the supply voltage is set relatively high of 8.5V. We improve it with 3.3V and save design space and cost by employing only one Mixer and IF_Amp comparing to the reference one in which two Mixers and two IF_Amps are used.