• ETRI Journal
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• 제32권3호
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• pp.457-459
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• 2010

A low-power down-sampling mixer in a low-power digital 65 nm CMOS technology is presented. The mixer consumes only 830 ${\mu}W$ at 1.2 V supply voltage by combining an NMOS and a PMOS mixer with cascade transistors at the output. The measured gain is (19 ${\pm}$1 dB) at frequencies between 100 MHz and 3 GHz. An IIP3 of -5.9 dBm is achieved.

• 전력전자학회논문지
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• 제20권2호
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• pp.167-174
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• 2015

This study describes how digital time delay deteriorates control performance in zero voltage switching (ZVS) phase-shifted full bridge (PSFB) converter. The small-signal model of the ZVS PSFB converter is derived from the buck-converter small-signal model. Digital time delay effects have been considered according to the digital sampling methods. The analysis verifies that digital time delays reduce the stability margin of the converter, and the double sampling technique exhibits better performance than the single sampling technique. Both simulation and experimental results based on 250 W ZVS PSFB confirm the validity of the analyses performed in the study.

• 품질경영학회지
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• 제24권4호
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• pp.1-13
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• 1996

The sequential sampling inspection method is an extension of the double-sampling and multiple-sampling methods and its theory is based on the sequential probability ratio test(SPRT). In this paper, the characteristics of SPRT for testing the propotion of defectives are approximated by using the estimated excess over the boundaries. The use of the estimated excess shows good performances in estimating the operating characteristic function and the average sample number of SPRT compared to the method by neglecting the excess. It also makes it possible to determine the boundary values which satisfy the desired error probabilities.

• 한국조사연구학회:학술대회논문집
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• 한국조사연구학회 2006년도 추계학술대회 발표논문집
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• pp.67-83
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• 2006

In successive sampling on two occasions the problem of estimating a finite population quantile has been considered. The theory developed aims at providing the optimum estimates by combining (i) three double sampling estimators viz. ratio-type, product-type and regression-type, from the matched portion of the sample and (ii) a simple quantile based on a random sample from the unmatched portion of the sample on the second occasion. The approximate variance formulae of the suggested estimators have been obtained. Optimal matching fraction is discussed. A simulation study is carried out in order to compare the three estimators and direct estimator. It is found that the performance of the regression-type estimator is the best among all the estimators discussed here.

• Journal of the Korean Statistical Society
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• 제36권4호
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• pp.543-556
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• 2007

In successive sampling on two occasions the problem of estimating a finite population quantile has been considered. The theory developed aims at providing the optimum estimates by combining (i) three double sampling estimators viz. ratio-type, product-type and regression-type, from the matched portion of the sample and (ii) a simple quantile based on a random sample from the unmatched portion of the sample on the second occasion. The approximate variance formulae of the suggested estimators have been obtained. Optimal matching fraction is discussed. A simulation study is carried out in order to compare the three estimators and direct estimator. It is found that the performance of the regression-type estimator is the best among all the estimators discussed here.

• 센서학회지
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• 제29권2호
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• pp.82-88
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• 2020

In this paper, we propose a complementary metal-oxide semiconductor (CMOS) binary image sensor with a gate/body-tied (GBT) p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET)-type photodetector using a double-tail comparator for high-speed and low-power operations. The GBT photodetector is based on a PMOSFET tied with a floating gate (n+ polysilicon) and a body that amplifies the photocurrent generated by incident light. A double-tail comparator compares an input signal with a reference voltage and returns the output signal as either 0 or 1. The signal processing speed and power consumption of a double-tail comparator are superior over those of conventional comparator. Further, the use of a double-sampling circuit reduces the standard deviation of the output voltages. Therefore, the proposed CMOS binary image sensor using a double-tail comparator might have advantages, such as low power consumption and high signal processing speed. The proposed CMOS binary image sensor is designed and simulated using the standard 0.18 ㎛ CMOS process.

• 디지털산업정보학회논문지
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• 제8권2호
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• pp.131-143
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• 2012

This paper introduces the double-density discrete wavelet transform using 3 direction separable processing method, which is a discrete wavelet transform that combines the double-density discrete wavelet transform and quincunx sampling method, each of which has its own characteristics and advantages. The double-density discrete wavelet transform is nearly shift-invariant. But there is room for improvement because not all of the wavelets are directional. That is, although the double-density DWT utilizes more wavelets, some lack a dominant spatial orientation, which prevents them from being able to isolate those directions. The dual-tree discrete wavelet transform has a more computationally efficient approach to shift invariance. Also, the dual-tree discrete wavelet transform gives much better directional selectivity when filtering multidimensional signals. But this transformation has more cost complexity Because it needs eight digital filters. Therefor, we need to hybrid transform which has the more directional selection and the lower cost complexity. A solution to this problem is a the double-density discrete wavelet transform using 3 direction separable processing method. The proposed wavelet transformation services good performance in image and video processing fields.

• 대한산업공학회지
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• 제30권3호
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• pp.205-212
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• 2004

This paper proposes the variables repetitive group sampling plan where the quality characteristic following normal distribution has upper or lower specification limit. The problem is formulated as a non-linear programming problem where the objective function to minimize is the average sample number and the constraints are related to lot acceptance probabilities at acceptable quality level (AQL) and limiting quality level (LQL) under the operating characteristic curve. Sampling plan tables are constructed for the selection of parameters indexed by AQL and LQL in the cases of known standard deviation and unknown standard deviation. It is shown that the proposed sampling plan significantly reduces the average sample number as compared with the single or the double sampling plan.

• 한국항공우주학회지
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• 제42권1호
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• pp.82-89
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• 2014

본 논문에서는 공진기 각진동에 의한 출력을 제거하기 위하여 복조방법을 사용하는 링레이저 자이로의 시간 양자화 오차를 감소시키기 위한 방법을 논의하였다. 링레이저 자이로에는 맥놀이 주파수를 검출하는 과정에서 발생하는 각도 양자화오차와 lock-in 현상을 해결하기 위하여 변조한 각진동을 출력으로부터 복조하는 과정에서 발생하는 시간 양자화오차가 있다. 시간 양자화 오차는 링레이저 자이로의 샘플링 주기가 자이로 각진동 주기에 동기된 복조방법을 사용하기 때문에 발생한다. 일반적으로 자이로 각진동 주기는 항법계산 주기에 비하여 길기 때문에, 탑재체의 자세를 빠른 속도로 업데이트 해야만 하는 고기동 환경에서는 시간양자화 오차에 의한 항법오차가 발생된다. 본 논문에서는 이러한 샘플링 시간 양자화오차를 줄이기 위하여 이중 복조방법을 제안하고, 시뮬레이션을 통하여 동적환경에서의 오차 감소현상을 확인하였다.

• 한국전자파학회논문지
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• 제29권10호
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• pp.811-816
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• 2018

MLFMM 알고리듬을 큰 산란체 문제에 적용하는 경우, transfer 함수의 계산이 최종 결과의 정확도에 큰 영향을 준다. 수치 과정 중 단위원 위에서 계산되는 적분의 정확도는 샘플링 수에 영향을 크게 받는다. 샘플링 수를 늘리면, 메모리와 계산시간도 같이 늘어나, 정확도가 유지되는 최소의 샘플링 수가 중요하다. 이는 산란체의 크기와 관련이 있어, 수치적으로 최적의 샘플링 수에 관한 오버샘플링 비율을 구하고, 대규모 산란체에서 검증한다.