• Title/Summary/Keyword: Double-Throw

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Design of a 6~18 GHz 8-Bit True Time Delay Using 0.18-㎛ CMOS (0.18-㎛ CMOS 공정을 이용한 6~18 GHz 8-비트 실시간 지연 회로 설계)

  • Lee, Sanghoon;Na, Yunsik;Lee, Sungho;Lee, Sung Chul;Seo, Munkyo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.11
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    • pp.924-927
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    • 2017
  • This paper presents a 6~18 GHz 8-bit true time delay (TTD) circuit. The unit delay circuit is based on m-derived filter with relatively constant group delay. The designed 8-bit TTD is implemented with two single-pole double-throw (SPDT) switches and seven double- pole double-throw (DPDT) switches. The reflection characteristics are improved by using inductors. The designed 8-bit TTD was fabricated using $0.18{\mu}m$ CMOS. The measured delay control range was 250 ps with 1 ps of delay resolution. The measured RMS group delay error was less than 11 ps at 6~18 GHz. The measured input/output return losses are better than 10 dB. The chip consumes zero power at 1.8 V supply. The chip size is $2.36{\times}1.04mm^2$.

Counter Weight Design of Multi-stage Reciprocating Air Compressors (다단 왕복동 공기압축기의 평형추 설계)

  • Kim, Young-Cheol;Kim, Byung-Ok;Shin, Hyun-Ik
    • 유체기계공업학회:학술대회논문집
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    • 2003.12a
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    • pp.656-661
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    • 2003
  • Modem reciprocating air compressors have tendency to a multi-stage W-type or V-type cylinder arrangement for the purpose of high outlet pressure, compactness and low vibration and noise. A valid counter weight calculation method using the complex expression is proposed for reducing the inertia forces of the compressor. Counter weight removes only 1st forward whirl component. Counter weight formulations are applied to the six various compressor structures which are (a) 1 cylinder single-throw crank shaft, (b) 2 cylinder single-throw crank shaft (c) 2 cylinder double-throw clank shaft, (d) 3 cylinder single-throw crank shaft, (e) 4 cylinder single-throw crank shaft and (f) 4 cylinder double-throw crank shaft. The improvement of performance is verified through available vibration test.

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High-Isolation SPDT RF Switch Using Inductive Switching and Leakage Signal Cancellation

  • Ha, Byeong Wan;Cho, Choon Sik
    • Journal of electromagnetic engineering and science
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    • v.14 no.4
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    • pp.411-414
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    • 2014
  • A switch is one of the most useful circuits for controlling the path of signal transmission. It can be added to digital circuits to create a kind of gate-level device and it can also save information into memory. In RF subsystems, a switch is used in a different way than its general role in digital circuits. The most important characteristic to consider when designing an RF switch is keeping the isolation as high as possible while also keeping insertion loss as low as possible. For high isolation, we propose leakage signal cancellation and inductive switching for designing a singlepole double-throw (SPDT) RF switch. By using the proposed method, an isolation level of more than 23 dB can be achieved. Furthermore, the heterojunction bipolar transistor (HBT) process is used in the RF switch design to keep the insertion loss low. It is demonstrated that the proposed RF switch has an insertion loss of less than 2 dB. The RF switch operates from 1 to 8 GHz based on the $0.18-{\mu}m$ SiGe HBT process, taking up an area of $0.3mm^2$.

A Study on design of the PZT Cantilever for Micro Switch (Micro Switch용 PZT Cantilever의 설계에 관한 연구)

  • Kim, In-Sung;Song, Jae-Sung;Min, Bok-Ki;Jeong, Soon-Jong;Muller, A.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.422-423
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    • 2005
  • RF Micro switches is a miniature device or an array of integration devices and mechanical components and fabricated with Ie batch-processing techniques. RF Micro switches application area are in phased arrays and reconfigurable apertures for defence and telecommunication systems, switching network for satellite communication, and single-pole double throw switches for wireless application. Recently, RF Micro switches have been developed for the application to the milimeter wave system. RF Micro switches offer a substantilly higher performance than PIN diode or FET switches. In this paper, SPDT(single-pole-double-throw) switch are designed to use 10 GHz. Actuation voltage and displacement are simulated by tool.

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A Study on design of the Ferroelectrics Cantilever for RF Switch (RF Switch용 강유전체 Cantilever 설계에 관한 연구)

  • Kim, In-Sung;Min, Bok-Ki;Song, Jae-Sung;Muller, A.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07b
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    • pp.652-655
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    • 2004
  • RF MEMS is a miniature device or an array of integration devices and mechanical components and fabricated with If batch-processing techniques. RF MEMS application area are in phased arrays and reconfigurable apertures for defence and telecommunication systems, switching network for satellite communication, and single-pole double throw switches for wireless application. Recently, RF MEMS switches have been developed for the application to the milimeter wave system. RF MEMS switches offer a substantilly higher performance than PM diode or FET switches. In this paper, SPDT(single-pole-double-throw) switch are designed to use 10 GHz. Actuation voltage and displacement are simulated by tool. And stress and distribution are simulated.

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A Study of 0.5-bit Resolution for True-Time Delay of Phased-Array Antenna System

  • Cha, Junwoo;Park, Youngcheol
    • International journal of advanced smart convergence
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    • v.11 no.4
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    • pp.96-103
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    • 2022
  • This paper presents the analysis of increasing the resolution of True-Time-Delay (TTD) by 0.5-bit for phased-array antenna system which is one of the Multiple-Input and Multiple Output (MIMO) technologies. For the analysis, a 5.5-bit True-Time Delay (TTD) integrated circuit is designed and analyzed in terms of beam steering performance. In order to increase the number of effective bits, the designed 5.5-bit TTD uses Single Pole Triple Throw (SP3T) and Double Pole Triple Throw (DP3T) switches, and this method can minimize the circuit area by inserting the minimum time delay of 0.5-bit. Furthermore, the circuit mostly maintains the performance of the circuit with the fully added bits. The idea of adding 0.5-bit is verified by analyzing the relation between the number of bits and array elements. The 5.5-bit TTD is designed using 0.18 ㎛ RF CMOS process and the estimated size of the designed circuit excluding the pad is 0.57×1.53 mm2. In contrast to the conventional phase shifter which has distortion of scanning angle known as beam squint phenomenon, the proposed TTD circuit has constant time delays for all states across a wide frequency range of 4 - 20 GHz with minimized power consumption. The minimum time delay is designed to have 1.1 ps and 2.2 ps for the 0.5-bit option and the normal 1-bit option, respectively. A simulation for beam patterns where the 10 phased-array antenna is assumed at 10 GHz confirms that the 0.5-bit concept suppresses the pointing error and the relative power error by up to 1.5 degrees and 80 mW, respectively, compared to the conventional 5-bit TTD circuit.

Design of a Dual-Band Switch with 2.4[GHz]/5.8[GHz] (2.4[GHz]/5.8[GHz] 이중대역 SPDT 스위치 설계)

  • Roh, Hee-Jung
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.8
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    • pp.52-58
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    • 2008
  • Ths paper describes the Dual-band switch which was proposed new structure that could improved the specification of broadband and designed by the optimized structure through simulation. The Dual-band switch with 2.4[GHz]/5.8[GHz] that can apply to 802.11a/b/g system that is commercialized present was studied to get a new structure with higher power, high isolation. The transmitter of switch was designed to operate a parallel switching element with stack structure of two FET. The receiver designed to have asymmetry structure that insert series FET in addition to basic serial/parallel FET. SPDT(Single Pole Double Throw) Tx/Rx FET switch is a device that can do switching from a port of input to two port of output. The fabricated SPDT switch has the characteristic of insertion loss of a below -3[dB] form DC to 6[GHz] and the isolation of a below -30D[dB](Rx mode).

X-Band 6-Bit Phase Shifter with Low RMS Phase and Amplitude Errors in 0.13-㎛ CMOS Technology

  • Han, Jang-Hoon;Kim, Jeong-Geun;Baek, Donghyun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.4
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    • pp.511-519
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    • 2016
  • This paper proposes a CMOS 6-bit phase shifter with low RMS phase and amplitude errors for an X-band phased array antenna. The phase shifter combines a switched-path topology for coarse phase states and a switch-filter topology for fine phase states. The coarse phase shifter is composed of phase shifting elements, single-pole double-throw (SPDT), and double-pole double-throw (DPDT) switches. The fine phase shifter uses a switched LC filter. The phase coverage is $354.35^{\circ}$ with an LSB of $5.625^{\circ}$. The RMS phase error is < $6^{\circ}$ and the RMS amplitude error is < 0.45 dB at 8-12 GHz. The measured insertion loss is < 15 dB, and the return losses for input and output are > 13 dB at 8-12 GHz. The input P1dB of the phase shifter achieves > 11 dBm at 8-12 GHz. The current consumption is zero with a 1.2-V supply voltage. The chip size is $1.46{\times}0.83mm^2$, including pads.

A Low Insertion-Loss, High-Isolation Switch Based on Single Pole Double Throw for 2.4GHz BLE Applications

  • Truong, Thi Kim Nga;Lee, Dong-Soo;Lee, Kang-Yoon
    • IEIE Transactions on Smart Processing and Computing
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    • v.5 no.3
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    • pp.164-168
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    • 2016
  • A low insertion-loss, high-isolation switch based on single pole double throw (SPDT) for a 2.4GHz Bluetooth low-energy transceiver is presented in this paper. In order to increase isolation, the body floating technique is implemented. Based on characteristics whereby the ratio of the sizes of the shunt and the series transistors significantly affect the performance of the switches, the device sizes are optimized. A simple matching network is also designed to enhance the insertion loss. Thus, the SPDT switch has high isolation and low insertion loss without increasing the complexity of the circuit. The proposed SPDT is designed and simulated in a complementary metal-oxide semiconductor 65nm process. The switch has a $530{\mu}m{\times}270{\mu}m$ area and achieves 0.9dB, 1.78dB insertion loss and 40dB, 41dB isolation of transmission, reception modes, respectively.

Design of a broadband(2㎓-5.8㎓) FET Switch Using Impedance Transformation Network (임피던스 변환회로를 이용한 광대역(2㎓-5.8㎓) FET 스위치 설계)

  • 노희정
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.18 no.4
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    • pp.155-159
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    • 2004
  • This paper describes the design and the simulation of a single pole double throw(SPDT) FET switch for wireless LAN(IEEE802.11a & IEEE802.11b) applications using drain impedance transformation network with Microstrip transmission line. At the receiving path insertion losses were from 0.8(㏈) to 1.462(㏈) between 2(㎓) and 4(㎓), from l.26(㏈) to 2.3(㏈) between 4.7(㎓) and 6.7(㎓) and the isolations were under 30(㏈) between 2(㎓) and 6.7(㎓). At the transmitting path insertion loss were from 1.18(㏈) to 2.87(㏈) between 2(㎓) and 4(㎓) from 0.625(㏈) to 1.2(㏈) between 4.7(㎓) and 6.7(㎓) and the isolations were under 30(㏈) between 2(㎓) and 6.7(㎓).