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http://dx.doi.org/10.5515/KJKIEES.2017.28.11.924

Design of a 6~18 GHz 8-Bit True Time Delay Using 0.18-㎛ CMOS  

Lee, Sanghoon (Department of Electronic and Computer Engineering, Sungkyunkwan University)
Na, Yunsik (Department of Electronic and Computer Engineering, Sungkyunkwan University)
Lee, Sungho (Korea Electronics Technology Institute)
Lee, Sung Chul (Korea Electronics Technology Institute)
Seo, Munkyo (Department of Electronic and Computer Engineering, Sungkyunkwan University)
Publication Information
Abstract
This paper presents a 6~18 GHz 8-bit true time delay (TTD) circuit. The unit delay circuit is based on m-derived filter with relatively constant group delay. The designed 8-bit TTD is implemented with two single-pole double-throw (SPDT) switches and seven double- pole double-throw (DPDT) switches. The reflection characteristics are improved by using inductors. The designed 8-bit TTD was fabricated using $0.18{\mu}m$ CMOS. The measured delay control range was 250 ps with 1 ps of delay resolution. The measured RMS group delay error was less than 11 ps at 6~18 GHz. The measured input/output return losses are better than 10 dB. The chip consumes zero power at 1.8 V supply. The chip size is $2.36{\times}1.04mm^2$.
Keywords
CMOS; True Time Delay; Single-Pole Double-Throw; Double-Pole Double-Throw; m-Derived Filter;
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Times Cited By KSCI : 1  (Citation Analysis)
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