• Title/Summary/Keyword: Double gate

Search Result 375, Processing Time 0.027 seconds

Analysis of Drain Induced Barrier Lowering of Asymmetric Double Gate MOSFET for Channel Doping Concentration (비대칭 DGMOSFET의 채널도핑농도에 따른 드레인 유도 장벽 감소현상 분석)

  • Jung, Hakkee;Kwon, Ohshin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2015.10a
    • /
    • pp.858-860
    • /
    • 2015
  • 본 연구에서는 비대칭 이중게이트 MOSFET의 채널 내 도핑농도에 대한 드레인 유도 장벽 감소 현상에 대하여 분석하고자한다. 드레인 유도 장벽 감소 현상은 드레인 전압에 의하여 소스 측 전위장벽이 낮아지는 효과로서 중요한 단채널 효과이다. 이를 분석하기 위하여 포아송방정식을 이용하여 해석학적 전위분포를 구하였으며 전위분포에 영향을 미치는 채널도핑 농도뿐만이 아니라 상하단 산화막 두께, 하단 게이트 전압 등에 대하여 드레인 유도 장벽 감소 현상을 관찰하였다. 결과적으로 드레인 유도 장벽 감소 현상은 채널도핑 농도에 따라 큰 변화를 나타냈다. 단채널 효과 때문에 채널길이가 짧아지면 도핑농도에 따른 영향이 증가하였다. 도핑농도에 대한 드레인유도장벽감소 현상의 변화는 상하단 산화막 두께에 따라 큰 변화를 보였으며 산화막 두께가 증가할수록 도핑농도에 따른 변화가 증가하는 것을 알 수 있었다. 또한 하단게이트 전압은 그 크기에 따라 도핑농도의 영향이 변화하고 있다는 것을 알 수 있었다.

  • PDF

Analysis of Drain Induced Barrier Lowering of Asymmetric Double Gate MOSFET for Channel Doping Profile (비대칭 DGMOSFET의 채널도핑분포함수에 따른 드레인 유도 장벽 감소현상 분석)

  • Jung, Hakkee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2015.10a
    • /
    • pp.863-865
    • /
    • 2015
  • 본 연구에서는 비대칭 이중게이트 MOSFET의 채널 내 도핑농도분포에 대한 드레인유도장벽감소(Drain Induced Barrier Lowering; DIBL)에 대하여 분석하고자한다. DIBL은 드레인 전압에 의하여 소스 측 전위장벽이 낮아지는 효과로서 중요한 단채널 효과이다. 이를 분석하기 위하여 포아송방정식을 이용하여 해석학적 전위분포를 구하였으며 전위분포에 영향을 미치는 채널도핑농도의 분포함수변화에 대하여 DIBL을 관찰하였다. 채널길이, 채널두께, 상하단 게이트 산화막 두께, 하단 게이트 전압 등을 파라미터로 하여 DIBL을 관찰하였다. 결과적으로 DIBL은 채널도핑농도분포함수의 변수인 이온주입범위 및 분포편차에 변화를 나타냈다. 특히 두 변수에 대한 DIBL의 변화는 최대채널도핑농도가 $10^{18}/cm^3$ 정도로 고도핑 되었을 경우 더욱 현저히 나타나고 있었다. 채널길이가 감소할수록 그리고 채널두께가 증가할수록 DIBL은 증가하였으며 하단 게이트 전압과 상하단 게이트 산화막 두께가 증가할수록 DIBL은 증가하였다.

  • PDF

A Study on the Diffusion Barrier Properties of Pt/Ti and Ni/Ti for Cu Metallization (구리 확산에 대한 Pt/Ti 및 Ni/Ti 확산 방지막 특성에 관한 연구)

  • 장성근
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.16 no.2
    • /
    • pp.97-101
    • /
    • 2003
  • New Pt/Ti and hi/Ti double-metal structures have been investigated for the application of a diffusion barrier between Cu and Si in deep submicron integrated circuits. Pt/Ti and Ni/Ti were deposited using E-beam evaporator at room temperature. The performance of Pt/Ti and Ni/Ti structures as diffusion barrier against Cu diffusion was examined by charge pumping method, gate leakage current, junction leakage current, and SIMS(secondary ion mass spectroscopy). These evaluation indicated that Pt/Ti(200${\AA}$/100${\AA}$) film is a good barrier against Cu diffusion up to 450$^{\circ}C$.

FPGA-Based Design of Black Scholes Financial Model for High Performance Trading

  • Choo, Chang;Malhotra, Lokesh;Munjal, Abhishek
    • Journal of information and communication convergence engineering
    • /
    • v.11 no.3
    • /
    • pp.190-198
    • /
    • 2013
  • Recently, one of the most vital advancement in the field of finance is high-performance trading using field-programmable gate array (FPGA). The objective of this paper is to design high-performance Black Scholes option trading system on an FPGA. We implemented an efficient Black Scholes Call Option System IP on an FPGA. The IP may perform 180 million transactions per second after initial latency of 208 clock cycles. The implementation requires the 64-bit IEEE double-precision floatingpoint adder, multiplier, exponent, logarithm, division, and square root IPs. Our experimental results show that the design is highly efficient in terms of frequency and resource utilization, with the maximum frequency of 179 MHz on Altera Stratix V.

Design of an Analog Content Addressable Memory Implemented with Floating Gate Treansistors (부유게이트 트랜지스터를 이용한 아날로그 연상메모리 설계)

  • Chai, Yong-Yoong
    • The Transactions of the Korean Institute of Electrical Engineers D
    • /
    • v.50 no.2
    • /
    • pp.87-92
    • /
    • 2001
  • This paper proposes a new content-addressable memory implemented with an analog array which has linear writing and erasing characteristics. The size of the array in this memory is $2{\times}2$, which is a reasonable structure for checking the disturbance of the unselected cells during programming. An intermediate voltage, Vmid, is used for preventing the interference during programming. The operation for reading in the memory is executed with an absolute differencing circuit and a winner-take-all (WTA) circuit suitable for a nearest-match function of a content-addressable memory. We simulate the function of the mechanism by means of Hspice with 1.2${\mu}m$ double poly CMOS parameters of MOSIS fabrication process.

  • PDF

Semi-analytical Modeling of Transition Metal Dichalcogenide (TMD)-based Tunneling Field-effect Transistors (TFETs)

  • Huh, In
    • Proceeding of EDISON Challenge
    • /
    • 2016.03a
    • /
    • pp.368-372
    • /
    • 2016
  • In this paper, the physics-based analytical model of transition metal dichalcogenide (TMD)-based double-gate (DG) tunneling field-effect transistors (TFETs) is proposed. The proposed model is derived by using the two-dimensional (2-D) Landauer formula and the Wentzel-Kramers-Brillouin (WKB) approximation. For improving the accuracy, nonlinear and continuous lateral energy band profile is applied to the model. 2-D density of states (DOS) and two-band effective Hamiltonian for TMD materials are also used in order to consider the 2-D nature of TMD-based TFETs. The model is validated by using the tight-binding non-equilibrium Green's function (NEGF)-based quantum transport simulation in the case of monolayer molybdenum disulfide ($MoS_2$)-based TFETs.

  • PDF

Current practices and economic performances of organic kiwifruit production in comparison with conventional one in Korea

  • Cho, Y.;Cho, H.;Park, M.;Ma, K.
    • Korean Journal of Organic Agriculture
    • /
    • v.19 no.spc
    • /
    • pp.199-202
    • /
    • 2011
  • Organic production practices varied among producers. Generally, organic producers were relying on imported input materials such as organic compost and liquid fertilizer even more than conventional producers. Very few organic farmers had composting facilities or sites for the own supply of compost in need. The productivity of organic kiwifruit orchard (92%) was not as low as that of conventional while the net income (243%) was more than double that of conventional. This was mainly attributed to high farm gate price of organic fruits, low paid labour use and electricity. As a consequence, organic kiwifruit production seems to become a feasible option in Korea. However, high dependence on imported farming material, fuel and labour for too frequent liquid fertilizer spray should be addressed to achieve long term sustainability of organic kiwifruit production.

Deviation of Threshold Voltage and Conduction Path for the Ratio of Top and Bottom Oxide Thickness of Asymmetric Double Gate MOSFET (비대칭 DGMOSFET의 상하단 산화막 두께비에 따른 문턱전압 및 전도중심의 변화)

  • Jung, Hakkee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2014.10a
    • /
    • pp.765-768
    • /
    • 2014
  • 본 연구에서는 비대칭 이중게이트 MOSFET의 상하단 게이트 산화막 두께 비에 대한 문턱전압 및 전도중심의 변화에 대하여 분석하고자한다. 비대칭 이중게이트 MOSFET는 상하단 게이트 산화막의 두께를 다르게 제작할 수 있어 문턱전압이하 영역에서 전류를 제어할 수 있는 요소가 증가하는 장점이 있다. 상하단 게이트 산화막 두께 비에 대한 문턱전압 및 전도중심을 분석하기 위하여 포아송방정식을 이용하여 해석학적 전위분포를 구하였다. 이때 전하분포는 가우스분포함수를 이용하였다. 하단게이트 전압, 채널길이, 채널두께, 이온주입범위 및 분포편차를 파라미터로 하여 문턱전압 및 전도중심의 변화를 관찰한 결과, 문턱전압은 상하단 게이트 산화막 두께 비에 따라 큰 변화를 나타냈다. 특히 채널길이 및 채널두께의 절대값보다 비에 따라 문턱전압이 변하였으며 전도중심이 상단 게이트로 이동할 때 문턱전압은 증가하였다. 또한 분포편차보단 이온주입범위에 따라 문턱전압 및 전도중심이 크게 변화하였다.

  • PDF

Floating Gate Organic Memory Device with Plasma Polymerized Styrene Thin Film as the Memory Layer (플라즈마 중합된 Styrene 박막을 터널링층으로 활용한 부동게이트형 유기메모리 소자)

  • Kim, Heesung;Lee, Boongjoo;Lee, Sunwoo;Shin, Paikkyun
    • Journal of the Korean Vacuum Society
    • /
    • v.22 no.3
    • /
    • pp.131-137
    • /
    • 2013
  • The thin insulator films for organic memory device were made by the plasma polymerization method using the styrene monomer which was not the wet process but the dry process. For the formation of stable plasma, we make an effort for controlling the monomer with bubbler and circulator system. The thickness of plasma polymerized styrene insulator layer was 430 nm, the thickness of the Au memory layer was 7 nm thickness of plasma polymerized styrene tunneling layer was 30, 60 nm, the thickness of pentacene active layer was 40 nm, the thickness of source and drain electrodes were 50 nm. The I-V characteristics of fabricated memory device got the hysteresis voltage of 45 V at 40/-40 V double sweep measuring conditions. If it compared with the results of previous paper which was the organic memory with the plasma polymerized MMA insulation thin film, this result was greater than 18 V, the improving ratio is 60%. From the paper, styrene indicated a good charge trapping characteristics better than MMA. In the future, we expect to make the organic memory device with plasma polymerized styrene as the memory thin film.

The Architectural Characteristics of Ch'ang-ts'ai-ts'un Village A Case Study on a Rural Village of the Korean Immigrants in Yen-Pien Area of China (중국(中國) 연변지구(延邊地區) 조선족(朝鮮族) 주거(住居)의 건축적(建築的) 특징(特徵) 용정시(龍井市) 지신향(智新鄕) 장재촌(長財村) 사례(事例)를 통해)

  • Shin, Jai Eok
    • Journal of architectural history
    • /
    • v.3 no.1
    • /
    • pp.101-122
    • /
    • 1994
  • This paper is one of the sequels from 'A Survey of Villages and Dwellings of Korean Immigrants in the North-Eastern Part of China'. It is the result of the extensive survey of Ch'ang-ts'ai-tsun village and covers several architectural characteristics of the dwellings. This paper alma to identify the 'double file' dwelling type, which is believed as one of the main stream of Korean folk dwelling. In this type, 'Chung-ju-kan' forms the central open space, where main household functions are carried out. This type originates from climatic reasons and functional reasons as well. This paper also aims to clarify how the dwelling forms are changed according to the life styles of various periods. The Korean immigrants in this village have experienced rapid changes in modern times like other Chinese. Through various political movements, the original dwelling type of this village has changed to adapt various needs and functions, which shows the simple truth : dwelling form changes according to the changes of life style and social structure. In this paper the directions of chimney through various periods are analyzed to verify the differences of the house layout methods and concepts of the time. The village had grown through 3 main periods before liberation period(1946), communization period(1946 - 1966) and contemporary period (1967 - ). It is concluded as follows: 1. The village was originated in late 19th century along the east-west street, which was a major routes of Korean Immigrants to China. In this area there was no regularity in its site plan. The direction of chimney, which was usually westward, was not determined according to the location of gate. This type was kept until liberization of this area, 1946. The plans of dwellings followed Ham-kyong-do 'double file' dwelling type, '6-kan dwelling' or '8-kan dwelling'. 2. The 'New Village' area, which was formed in the communization period, has a strict regularity in its site plan. The direction of chimney was determined as opposite direction of the gate. This method was maintained until 1976, when Mao died and new 'open' policy was held by Chinese government. In this area the 'dwelling house' plan type was not changed, but its layout and size were restricted. The general form of the dwelling in this village was shaped in this period. 3. The contemporary dwellings were built in random site location. The dwelling type was changed because of the reduction of family size and the permissin of private ownership. The number of rooms was reduced but the storage rooms and domestic animal hutches were added. But the 'Chung-ju-kan', the major chacteristics of north-eastern Korea dwelling is still kept. It becomes one large 'Chtin-ju-kan' room like 'open plan' type.

  • PDF