• Journal of Sensor Science and Technology
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• v.8 no.6
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• pp.434-439
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• 1999

Differential field effect transistors with double gate metal for integrated humidity sensors have been fabricated and the drain current drift characteristics to relative humidity have been investigated. The aspect ratio was 250/50 for both transistors to get the current difference between the sensing device and non-sensing one. The normalized drain current of the fabricated humidity sensitive field effect transistors increases from 0.12 to 0.3, as relative humidity increases from 30% to 90%.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.11
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• pp.1023-1028
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• 2003

The field emission characteristics are studied by simulation for carbon nanotube triode structures with a strip-shaped emitter and a gate hole aligned with it. Two structures, one with double-edge and the other with single edge are analyzed. They show good emission characteristics. Emissions of electrons are concentrated on the edges of emitter and the emitted current increases as the distance between emitter and gate decreases. For single-edged emitter, the emitted electrons form a narow strip-shaped beam which has a good directionality. These triode structures have advantages in that they can be easily fabricated and aligned for assembly.

• Transactions on Electrical and Electronic Materials
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• v.10 no.6
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• pp.189-192
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• 2009

The leakage current in a CMOS image sensor (CIS) can have various origins. Leakage current investigations have focused on such things as cobalt-salicide, source and drain scheme, and shallow trench isolation (STI) profile. However, there have been few papers examining the effects on leakage current of nitride stringers that are formed by gate sidewall etching. So this study reports the results of a series of experiments on the effects of a nitride stringer on real display images. Different step heights were fabricated during a STI chemical mechanical polishing process to form different nitride stringer sizes, arsenic and boron were implanted in each fabricated photodiode, and the doping density profiles were analyzed. Electrons that moved onto the silicon surface caused the dark leakage current, which in turn brought up the speckle defect on the display image in the CIS.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.775-778
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• 1987

Double-diffused metal oxide power semiconductor field effect transistors are used extensively in recent years in various circuit applications. The temperature variation of the drain current at a fixed bais shows both positive and negative resistance characteristics depending on the gate threhold voltage and gate-to source bias voltage. In this study, the decision method of the internal temperature measurement by $V_{GS}$ and $V_{DS}$ are presented.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2008.05a
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• pp.535-538
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• 2008

Insert-injection molding can inject two different materials or two colors in the same mold and process. If this injection process use, product has ability because the base part maintain strength and specified part can inject soft-material. It makes the cost down by single operation automatically for saving wages. In this paper, we designed double-injection mold for automobile remote control to inject secondary using this part as insert after inject external appearance of product. CAE analysis was progressed gate location and runner size as variable and analysis result is reflected in mold design process. As a result, it could solved badness that is generated at the conventional mold. Additionally, cost is downed by reducing loss of runner as well as could omit painting process because surface of finished product is improved through new mold.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.14-15
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• 2009

Insulated Gate Bipolar Transistor(IGBTs) are widely used in power device industry. However, to improve the breakdown voltage, IGBTs are suffered from increasing on-state voltage drop due to structural design. In this paper, the new structure is proposed to solve this problem. The proposed structure has double p-floating layer inserted in n-drift layer. The p-floating layers improve the breakdown voltage compared to conventional IGBT without change of other electrical characteristics such as on-state voltage drop and threshold voltage. this is because the p-floating layers expand electric field distribution at blocking state. A electrical characteristic of proposed structure is analyzed by using simulators such as TSUPREM and MEDICI. As a result, on-state voltage drop and threshold voltage are same to a conventional TIGBT, but breakdown voltage is improved to 16%.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.228-231
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• 1999

This paper describes the design and implementation of an application specific instruction-set processor developed for embedded DSP applications. The instruction-set has an uniform size of 16 bits, and supports 3 types of instructions: Primitive, Complex, and Specific. To reduce code size and cycle count we introduce complex instructions that can be selected according to the application under consideration, which leads to 50% code size reduction maximally. The processor has two independent data memories to double the data throughput and the address space. The processor is synthesized by 0.6$\mu$m single-poly double-metal technology. Critical path simulation shows that the maximum frequency is 110MHz and total gate count is 132, 000.

• Proceeding of EDISON Challenge
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• 2015.03a
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• pp.343-346
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• 2015

Ultra-thin body transistor is one of the emerging devices since it control leakage current flows through substrate. In addition, it can be operated by double gates, thus, its on/off current ratio is higher than conventional counterpart. In this paper, we design and investigate a CMOS inverter based on ultra-thin body MOSFETs to estimate its performance in real application. NEGF (non-equilibrium Green's function) method is used to obatain relationship between drain current and voltage. DC transfer is extracted from the relationship, and FO4 (fanout-of-4) propagation delay is reported as 5.1 ps estimated by a simple model.

• Journal of the Korean Ceramic Society
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• v.31 no.1
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• pp.74-78
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• 1994

Degradation of thin oxide by doped poly-Si and its improvement were studied. The gate oxide can be degraded by phosphorous in poly-Si doped POCl3. The degradation is increased with the decrement of sheet resistance and poly-Si thickness. Oxide failures of amorphous-Si are higher than those of poly-Si. In-situ double deposition of amorphous-Si, 54$0^{\circ}C$/30 nm, and poly-Si, 6$25^{\circ}C$/220 nm, forms the mismatch structure of grain boundary between amorphous-Si and poly-Si, and suppresses the excess phosphorous on oxide surface by the mismatch structure. The control of phosphorous through grain boundary improves the oxide reliability.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.2
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• pp.254-259
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• 1987

This paper describes the CMOS standard cell library implemented in double metal single poly gate process with 3\ulcornerm design rule, and its results of testing. This standard cell library contains total 33 cells of random logic gates, flip-flop gates and input/output buffers. All of cell was made to have the equal height of 98\ulcornerm, and width in multiple constant grid of 9 \ulcornerm. For cell data base, the electric characteristics of each cell is investigated and delay is characterized in terms of fanout. As the testing results of Ring Oscillator among the cell library, the average delay time for Inverter is 1.05 (ns), and the delay time due to channel routing metal is 0.65(ps)per unit length.