• 제목/요약/키워드: Dopant segregation

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Control of axial segregation by the modification of crucible geometry

  • Lee, Kyoung-Hee
    • 한국결정성장학회지
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    • 제18권5호
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    • pp.191-194
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    • 2008
  • We will focus on the horizontal Bridgman growth system to analyze the transport phenomena numerically, because the simple furnace system and the confined growth environment allow for the precise understanding of the transport phenomena in solidification process. In conventional melt growth process, the dopant concentration tends to vary significantly along the crystal. In this work, we propose the modification of crucible geometry for improving the productivity of silicon single-crystal growth by controlling axial specific resistivity distribution. Numerical analysis has been performed to study the transport phenomena of dopant impurities in conventional and proposed Bridgman silicon growth using the finite element method and implicit Euler time integration. It has been demonstrated using mathematical models and by numerical analysis that proposed method is useful for obtaining crystals with superior uniformity along the growth direction at a lower cost than can be obtained by the conventional melt growth process.

Two dimensional analysis of axial segregation by convection-diffusion model in batchwise and continuous Czochralski process

  • Wang, Jong-Hoe;Kim, Do-Hyun
    • 한국결정성장학회:학술대회논문집
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    • 한국결정성장학회 1997년도 Proceedings of the 13th KACG Technical Meeting `97 Industrial Crystallization Symposium(ICS)-Doosan Resort, Chunchon, October 30-31, 1997
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    • pp.117-121
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    • 1997
  • It is shown theoretically that uniform axial dopant concentration distribution can be made throughout the crystal by continuous Czochralski process. Numerical simulation are performed for the transient two-dimensional convection-diffusion model. A typical value of the growth and system parameters for Czochralski growth of p-type, 4 inches silicon crystal was used in the numerical calculations. Using this model with proper model parameter, the axial segregation in batchwise Czochralski growth can be described. It is studied by comparing with the experimental data. With this model parameter, the uniform axial concentration distribution of dopant is predicted in continuous Czochralski process.

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Impact of Segregation Layer on Scalability and Analog/RF Performance of Nanoscale Schottky Barrier SOI MOSFET

  • Patil, Ganesh C.;Qureshi, S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제12권1호
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    • pp.66-74
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    • 2012
  • In this paper, the impact of segregation layer density ($N_{DSL}$) and length ($L_{DSL}$) on scalability and analog/RF performance of dopant-segregated Schottky barrier (DSSB) SOI MOSFET has been investigated in sub-30 nm regime. It has been found that, although by increasing the $N_{DSL}$ the increased off-state leakage, short-channel effects and the parasitic capacitances limits the scalability, the reduced Schottky barrier width at source-to-channel interface improves the analog/RF figures of merit of this device. Moreover, although by reducing the $L_{DSL}$ the increased voltage drop across the underlap length reduces the drive current, the increased effective channel length improves the scalability of this device. Further, the gain-bandwidth product in a common-source amplifier based on optimized DSSB SOI MOSFET has improved by ~40% over an amplifier based on raised source/drain ultrathin-body SOI MOSFET. Thus, optimizing $N_{DSL}$ and $L_{DSL}$ of DSSB SOI MOSFET makes it a suitable candidate for future nanoscale analog/RF circuits.

UMG(Upgraded Metallurgical Grade) 규소 이용한 다결정 잉곳의 불순물 편석 예측 (Estimation of the impurity segregation in the multi-crystalline silicon ingot grown with UMG (Upgraded Metallurgical Grade) silicon)

  • 정광필;김영관
    • 한국결정성장학회지
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    • 제18권5호
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    • pp.195-199
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    • 2008
  • 반도체용 규소 원료는 11 N급의 고순도이나 가격이 고가이고 또한 생산이 제한되어서 폭발적인 태양전지의 수요를 따르지 못하고 있어 저급(5$\sim$6 N)의 UMG(Upgraded Metallurgical Grade)를 사용하자 하는 노력이 진행 중이다. 이 5$\sim$6 N급에서는 dopant 원소인 붕소(B)외 인(P)의 농도가 1 ppm 이상 존재한다. 이들 원료를 사용하여서 결정 성장을 하였을 경우에 존재하는 여러 불순물들의 편석계수(segregation coefficient)를 활용하여 화학적, 전기적 성질을 예상 하여본 결과 결정성장 초기에는 붕소(B)의 농도가 인(P) 보다 높아 p영역이 발생하고 후반부에는 인의 농도가 붕소 보다 높아 n 형 기판이 생성됨을 보았다. 또한 응고속도를 조절하여 여러 불순물을 제거하고자 히는 노력은 편식계수가 적은 금속 일소들의 제거에는 효과적이나 편석계수가 큰 붕소와 인의 제거에는 효과가 크지 않음을 예상 할 수 있다.

A Consideration on Segregation Process of Dopant at WC/Co and WC/WC Interfaces in VC Doped WC-Co Submicro-grained Hardmetal

  • Kawakami, Masaru;Terada, Osamu;Hayashi, Koji
    • 한국분말야금학회:학술대회논문집
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    • 한국분말야금학회 2006년도 Extended Abstracts of 2006 POWDER METALLURGY World Congress Part 1
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    • pp.334-335
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    • 2006
  • WC/WC interface in VC mono-doped WC-10mass%Co submicro-grained hardmetals of $0.5\;{\mu}m$ was investigated together with WC/Co interface by using HRTEM and XMA. The thickness of V-rich layer and the analytical value of V at WC/WC interface were almost the same as those at WC/Co interfaces. These results, etc., suggested that the V-rich layers at both interfaces were not generated by an equilibrium segregation mechanism in the sintering stage, but generated by a preferential precipitation mechanism during the solidification of Co liquid phase in the cooling stage. Based on this suggestion, we succeeded in developing a nano-grained hardmetal with 100 nm $(0.1\;{\mu}m)$.

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Ion Mass Doping 법을 이용한 Phosphorus 주입된 실리콘 박막의 Annealing 특성 (Annealing Characteristic of Phosphorus Implanted Silicon Films using an Ion Mass Doping Method)

  • 강창용;최덕균;주승기
    • 한국표면공학회지
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    • 제27권4호
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    • pp.234-240
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    • 1994
  • A large area impurity doping method for poly-Si TFT LCD has been developed. The advantage of this method is the doping of impurities into Si over a large area without mass separation and beam scanning. Phosphorus diluted in hydrogen was discharged by RF(13.56MHz) power and ions from discharged gas were accelerated by DC acceleration voltage and were implanted into deposited Si films. The annealing characteristic of this method was similar to that of the ion implantation method in the low doping concentration. Three mechanisms were evolved in the annealing characteristics of phosphorus doped Si films. Point defects annihilation and the retrogradation of dopant atoms at grain boundaries as a result of grain growth played a major role at low and high annealing temperature, respectively. However, due to the dopant segregation, the reverse annealing range existed at intermediate annealing temperature.

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Electrical Behavior of Aluminum Nitride Ceramics Sintered with Yttrium Oxide and Titanium Oxide

  • Lee, Jin-Wook;Lee, Won-Jin;Lee, Sung-Min
    • 한국세라믹학회지
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    • 제53권6호
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    • pp.635-640
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    • 2016
  • Electrical behavior of AlN ceramics sintered with $Y_2O_3$ as a sintering aid has been investigated with respect to additional $TiO_2$ dopant. From the impedance spectroscopy, it was found that the grain and grain boundary conductivities have greatly decreased with addition of $TiO_2$ dopant. The $TiO_2$ dopant also increased the activation energy of the grain conductivity by about 0.37 eV; this increase was attributed to the formation of an associate between Al vacancies and Ti ions at the Al sites. Similarly, the electronic conductivity was reduced by $TiO_2$ addition. However, $TiO_2$ solubility in AlN grains was below the detection limit of typical EDX analysis. Grain boundary was clean, without liquid films, but did show yttrium segregation. The transference number of ions was close to 1, showing that AlN is a predominantly ionic conductor. Based on the observed results, the implications of using AlN applications as insulators have been discussed.

Schottky Barrier Tunnel Field-Effect Transistor using Spacer Technique

  • Kim, Hyun Woo;Kim, Jong Pil;Kim, Sang Wan;Sun, Min-Chul;Kim, Garam;Kim, Jang Hyun;Park, Euyhwan;Kim, Hyungjin;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권5호
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    • pp.572-578
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    • 2014
  • In order to overcome small current drivability of a tunneling field-effect transistor (TFET), a TFET using Schottky barrier (SBTFET) is proposed. The proposed device has a metal source region unlike the conventional TFET. In addition, dopant segregation technology between the source and channel region is applied to reduce tunneling resistance. For TFET fabrication, spacer technique is adopted to enable self-aligned process because the SBTFET consists of source and drain with different types. Also the control device which has a doped source region is made to compare the electrical characteristics with those of the SBTFET. From the measured results, the SBTFET shows better on/off switching property than the control device. The observed drive current is larger than those of the previously reported TFET. Also, short-channel effects (SCEs) are investigated through the comparison of electrical characteristics between the long- and short-channel SBTFET.

급속 열처리 공정에 의한 다결정 실리콘 박막의 전기적, 구조적 특성 연구 (Effects of the Rapid Thermal Annealing on the Electrical and Structural Properties of Polysilicon Films)

  • 김윤태;유형준;전치훈;장원익;김상호
    • 대한전자공학회논문지
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    • 제25권9호
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    • pp.1060-1067
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    • 1988
  • In this paper, we have investigated the effects of rapid thermal process on the electrical and structural properties of silicon films. It was shown that required times and temperature for the successful activation of dopants (Boron, Phosphorus:5E15atoms/cm\ulcorner were above 1000\ulcorner, 10sec, respectively. The typical resistivities of films deposited below 600\ulcorner were in the range of 1.0 E-3ohm-cm which was 20-30% lower than that of initially polycrystalline silicon depositd above 600\ulcorner. After rapid thermal process at high temperature above 1000\ulcorner, the films did not reveal any change in resistivity due to the dopant segregation, and better electrical conductivity could be obtained by increasing the process time. The grain growth by RTA treatment was more salient in the case of the doped amorphous than that of initially polycrystalline. The surface of the films also preserved the higher structural perfection and surface smoothness.

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레이저 열처리된 다결정 실리콘 기판을 이용한 소트키 다이오드의 제작 및 그 전기적 특성에 관한 연구 (A study on the fabrication and its electrical characteristics of the schottky diodes on the laser anneled poly-si substrate)

  • 김재영;강문상;구용서;안철
    • 전자공학회논문지A
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    • 제33A권4호
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    • pp.106-111
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    • 1996
  • Schottky diodes are fabricated on laser annealed and unannealed polysilicon substrate and their electrical characteristics are studied and analyzed. Current of laser annealed devices are larger than that of unannealed devices because of grain growth, decrease of grain boundary and trap density, lowering of grain boundary barrier height, decrease of dopant segregation. At low forward bias (<0.7V), currents of unanealed devices are larger. Soft breakdown voltages of laser annealed devices are larger than that of unannealed devices.

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