• Journal of the Korean Institute of Telematics and Electronics
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• v.14 no.5
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• pp.7-14
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• 1977

Conventionally, a TIVT has been used for high power amplification in the microwave frequency range. However, an ultra-high-power amplifier in the 2GHz range has successfully been designed and fabricated employing high power transistors developed recently and available commercially. In the design of the amplifier, a balanced-pair configuration is adopted in order to obtain very high microwave power, and a good impedance matching is achieved by making use of microstripline techniques. For the RF power divider as well as combiner, an approach of stripline directional coupler isadopted because of its easiness in fabrication. The coupler so designed and fabricated indicates a satisfactory performance as a quadrature hybrie coupler. Measurements on the amplifier developed for an immediate commercial application also exhibit excellent overall performance characteristics RF power output, 14 watts, gain 14dB, frequency bandwidth, 160MHz, effciency 40%.

• International Journal of Ocean System Engineering
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• v.1 no.4
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• pp.205-210
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• 2011

High data-rate underwater communications is demanded. This demand imposes stringent requirements on underwater communication equipment of phase-locked-loop (PLL). Phase noise in PLL is unwanted and unavoidable. In this paper, we investigate the PLL phase noise effect on high order QAM for underwater communication systems. The phase noise model using power spectral density is adopted for performance evaluation. The phase noise components considered in PLL are reference oscillator, voltage controlled oscillator (VCO), filter and divider. The filters in PLL noise are assumed to be second order active and passive low pass filters. Through simulation, we analyze the phase noise characteristics of the four components and then investigate the performance improvement factor of each component. Consequently, we derive specifications of VCO, phase detector, divider to meet performance requirement of high data-rate communication using QAM under phase noise influence.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1895-1897
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• 1996

Lightning impulse voltage is essential to evaluate the insulation performance of electric power apparatus. Recently international standard (IEC-60) on high voltage measurement techniques are being revised. In the draft of this standard, a new calibration method is introduced and the accuracy of most industrial measuring systems is maintained by means of comparison test against the reference measuring systems. Comparison tests of dividers for chopped lightning impulse measurement were rallied out by KERI. The 700kV shielded resisitive divider with and without compensation element were done comparison test with 300kV PTB divider which have the similar charateristics as that were circulated among the laboratories. This paper reports on the calculation results of response charateristics obtained by EMTP and the comparison test results with chopped lightning impulse voltages from 150kV to 250kV. It is demonstrated that KERI are capable of realizing the idea in the revision of the IEC standand, that is, to establish traceability.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.2
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• pp.66-72
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• 2009

In this paper, an efficient frequency offset synchronization structure for OFDM(Orthogonal Frequency Division Multiplexing) is proposed. Conventional CORDIC(Coordinate Rotation Digital Computer) algorithm for frequency offset synchronization utilizes two CORDIC hardware i.e., one is vector mode for phase estimation, the other is rotation mode for compensation. But proposed structure utilizes one CORDIC hardware and divider. Through simulation, it is shown that hardware implementation complexity is reduced compared with conventional structures. The Verilog-HDL coding and front-end chip implementation results for the proposed structure show 22.1% gate count reduction comparison with those of the conventional structure.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.45 no.5
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• pp.118-125
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• 2008

In this paper, an efficient frequency offset synchronization structure for OFDM(Orthogonal Frequency Division Multiplexing) is proposed. Conventional CORDIC(Coordinate Rotation Digital Computer) algorithm for frequency offset synchronization utilizes two CORDIC hardware i.e., one is vector mode for phase estimation, the other is rotation mode for compensation. But proposed structure utilizes one CORDIC hardware and divider. Through simulation, it is shown that hardware implementation complexity is reduced compared with conventional structures. The Verilog-HDL coding and front-end chip implementation results for the proposed structure show 22.1% gate count reduction comparison with those of the conventional structure.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.127-130
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• 2003

An RSFQ (Rapid Single Flux Quantum) counter can be used as a frequency divider that was an essential part of a programmable voltage standard chip. The voltage standard chip is composed of two circuit parts, a counter and an antenna Analog signal of tens to hundreds ㎓ may be applied to a finline antenna part. This analog signal can be converted to the stream of SFQ voltage pulses by a DC/SFQ circuit. The number of voltage pulses can be reduced by 2n times when they pass through a counter that is composed of n T Flip-Flops (Toggle Flip-Flop). Such a counter can be used not only as a frequency divider, but also to build a programmable voltage standard chip. So, its application range can be telecommunication, high speed RAM, microprocessor, etc. In this work, we have used Xic, WRspice, and L-meter to design an RSFQ counter. After circuit optimization, we could obtain the bias current margins of the T Flip-Flop circuit to be above 31％ Our RSFQ counter circuit designs were based on the 1 ㎄/$\textrm{cm}^2$ niobium trilayer technology.

• International Journal of Internet, Broadcasting and Communication
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• v.10 no.3
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• pp.109-114
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• 2018

In order to improve performance for the size of the BLPD, the CCL is used for the realization as the delay line. As realizing lower coupling coefficient and lower characteristic impedance, the CCL has good performance of the phase delay. The CCL is applied as the compact BLPD with optimized coupling factor and matched impedance because the lower coupling coefficient and lower characteristic impedance are increased the size and the loss, respectively. Designed BLPD using the CCL has the size of $0.13{\lambda}_g{\times}0.13{\lambda}_g$ and the size-reduction ratio of fabricated BLPD using the CCL has 58.5% ($21.08{\times}21.40mm^2$). Also, fabricated BLPD is measured the insertion loss of 3.16dB at the center frequency of 1.78GHz and the 20dB bandwidth is 9.58%. Differenced magnitude and phase between threw port and coupled port are measured 0.1dB and $89.9^{\circ}$, respectively. These performances are almost same compared with the conventional BLPD. Suggested application of the CCL can be used various devices and circuits for the size-reduction.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.6 no.1
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• pp.28-36
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• 1995

In this paper, a design method of multiple n-way low loss power divider for x-band is propossed. To decrease loss, only two-stages of transmission lines are used with isolation resistors for match. Ex- perimental results for 3-way and 4-way power dividers have the divided power of 5.54~6.17dB and 6.76~7.37 dB, the return loss of more than 17dB and 12dB, and the isolation of more than 18dB and 10dB at center frequency, respectively, The measured results show good agreement with the theoretical analysis.

• Journal of information and communication convergence engineering
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• v.13 no.2
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• pp.81-85
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• 2015

A 94-GHz phased array antenna using a log-periodic antenna has been developed on a GaAs substrate. The developed phased array antenna comprises four log-periodic antennas, a phase shifter, and a Wilkinson power divider. This antenna was fabricated using the standard microwave monolithic integrated circuit (MMIC) process including an air bridge for unipolar circuit implementations on the same GaAs substrate. The total chip size of the fabricated phased array antenna is 4.8 mm × 4.5 mm. Measurement results showed that the fabricated phased array antenna had a very wide band performance from 80 GHz to 110 GHz with return loss characteristics better than -10 dB. In the center frequency of 94 GHz, the fabricated phased array antenna showed a return loss of -16 dB and a gain of 4.43 dBi. The developed antenna is expected to be widely applied in many applications at W-band frequency.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2427-2429
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• 2005

OLED in the spotlight of display market has advantages of low power driving, self-emission and fast response. But it has disadvantages of inefficient luminescence and high power consumption. Most of PM(passive Matrix) DC-DC converters in common use is using voltage divider. This voltage divider type has some difficulties of suitable electric device selection for voltage division and of the stabilized output due to feedback current trimming. Therefore, noise analysis and power solution in OLED are important technologies having an effect on electric characteristics. In this dissertation, we have obtained the stable output by using digital signals in multi-channel DC-DC converter, the profit of power consumption reduction of driving source and economical efficiency in the PCB board size.