• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.10
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• pp.27-34
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• 1993

In this paper, a driver system is designed and implemented to achieve 4-level gray scale CH TFEL(Thin Film ElectroLuminescent) flat panel display. To implement the driver system, commercial EL driver IC chips are used to apply high voltage pulses to the EL panel and a high voltage switching circuit is designed for the EL driver IC. A new method of reducing storage delay time of transistor is proposed to obtain a reliable switching circuit. The controller for EL driver and switching circuit is also designed. The designed driving scheme applicable to EL display with 4-level gray scale is based on the linear characteristics of brightness vs. frequency of AC TFEL. By experiment, it has been shown that the brightness of AC TEFL display with the implemented driving system is controlled by the level of gray scale.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.298-302
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• 2006

Driver electronics for emerging display technologies are presented for OLED's, microdisplays, electrophoretic displays & bi-stable LCD's. Key factors for commercialization of these technologies are derived from the experience of the LCD's, including driver IC designs, wafer and assembly processes & applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.6 s.360
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• pp.83-88
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• 2007

In this paper, we propose the function verification method of the OLED(Organic Light Emitting Diode) drive IC using PLI verification method. This method uses the HDL(Hardware Description Language) simulator, PLI(Programing Language Interface), and GUI (Graphic User Interface) image viewer. This method improves the execute efficiency 40 times than conventional function verification methods. The proposed method can be used efficiently for function verification of DDI(display driver IC) design step.

• Journal of Information Display
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• v.13 no.2
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• pp.73-82
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• 2012

In this paper, a light-emitting diode (LED) backlight driver integrated circuit (IC) for medium-sized liquid crystal displays (LCDs) is proposed. In the proposed IC, a linear current regulator with matched internal resistors and an adaptive phase-shifted pulse-width modulation (PWM) dimming controller are also proposed to improve LED current uniformity and reliability. The double feedback loop control boost converter is used to achieve high power efficiency, fast transient characteristic, and high dimming frequency and resolution. The proposed IC was fabricated using the 0.35 ${\mu}m$ bipolar-CMOS-DMOS (BCD) process. The LED current uniformity and LED fault immunity of the proposed IC were verified through experiments. The measured power efficiency was 90%; the measured LED current uniformity, 97%; and the measured rising and falling times of the LED current, 86 and 7 ns, respectively. Due to the fast rising and falling characteristics, the proposed IC operates up to 39 kHz PWM dimming frequency, with an 8-bit dimming resolution. It was verified that the phase difference between the PWM dimming signals is changed adaptively when LED fault occurs. The experiment results showed that the proposed IC meets the requirements for the LED backlight driver IC for medium-sized LCDs.

• Journal of Satellite, Information and Communications
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• v.8 no.2
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• pp.36-43
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• 2013

In this study, the high current behaviors and double snapback mechanism of gate grounded_extended drain n-type MOSFET(GG_EDNMOS) device were analyzed in order to realize the robust electrostatic discharge(ESD) protection performances of high voltage operating display driver IC(DDIC) chips. Both the transmission line pulse(TLP) data and the thermal incorporated 2-dimensional simulation analysis as a function of ion implant conditions demonstrate a characteristic double snapback phenomenon after triggering of bipolar junction transistor(BJT) operation. Also, the background carrier density is proven to be a critical factor to affect the high current behavior of the GG_EDNMOS devices.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2012.10a
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• pp.661-662
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• 2012

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.481-487
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• 2016

A new two-line based inversion driving method is introduced for low power display-driver ICs. By inserting a timing offset between the chopper stabilization and the alternation of LCD polarity, we can reduce power consumption without noticeable degradation in the display quality. By applying the proposed scheme to 12" LCD applications, we achieved 7.5% and 27% power saving in the display-driver IC with white and black patterns, respectively.

• Journal of the Semiconductor & Display Technology
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• v.10 no.4
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• pp.7-13
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• 2011

In this paper, the IC(Integrated Circuit) for multi-channel synchronous communication was designed by using FPGA and VHDL language. The existing chips for synchronous communication that has been used commercially are composed for one to two channels. Therefore, when communication system with three channels or more is made, the cost becomes high and it becomes complicated for communication system to be realized and also has very little buffer, load that is placed into Microprocessor increases heavily in case of high speed communication or transmission of high-capacity data. The designed IC was improved the function and performance of communication system and reduced costs by designing 8 synchronous communication channels with only one IC, and it has the size of transmitter/receiver buffer with 1024 bytes respectively and consequently high speed communication became possible. It was designed with a communication signal of a form various encoding. To detect errors of communications, the CRC-ITU-T logic and channel MUX logic was designed with hardware logics so that the malfunction can be prevented and errors can be detected more easily and input/output port regarding each communication channel can be used flexibly and consequently the reliability of system was improved. In order to show the performance of designed IC, the test was conducted successfully in Quartus simulation and experiment and the excellence was compared with the 85C3016VSC of ZILOG company that are used widely as chips for synchronous communication.

• Journal of the Semiconductor & Display Technology
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• v.10 no.3
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• pp.1-6
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• 2011

In this paper, the IC(Integrated Circuit) for multi-channel synchronous communication was designed by using FPGA and VHDL language. The existing chips for synchronous communication that has been used commercially are composed for one to two channels. Therefore, when communication system with three channels or more is made, the cost becomes high and it becomes complicated for communication system to be realized and also has very little buffer, load that is placed into Microprocessor increases heavily in case of high speed communication or transmission of high-capacity data. The designed IC was improved the function and performance of communication system and reduced costs by designing 8 synchronous communication channels with only one IC, and it has the size of transmitter/receiver buffer with 1024 bytes respectively and consequently high speed communication became possible. It was designed with a communication signal of a form various encoding. To detect errors of communications, the CRC-ITU-T logic and channel MUX logic was designed with hardware logics so that the malfunction can be prevented and errors can be detected more easily and input/output port regarding each communication channel can be used flexibly and consequently the reliability of system was improved. In order to show the performance of designed IC, the test was conducted successfully in Quartus simulation and experiment and the excellence was compared with the 85C3016VSC of ZILOG company that are used widely as chips for synchronous communication.

• The Magazine of the IEIE
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• v.31 no.9
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• pp.109-126
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• 2004