• Title/Summary/Keyword: Direct leakage current

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Active-Clamp AC-DC Converter with Direct Power Conversion (직접전력변환 방식을 이용한 능동 클램프 AC-DC 컨버터)

  • Cho, Yong-Won;Kwon, Bong-Hwan
    • The Transactions of the Korean Institute of Power Electronics
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    • v.17 no.3
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    • pp.230-237
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    • 2012
  • This paper proposes an active-clamp ac-dc converter with direct power conversion that has a simple structure and achieves high efficiency. The proposed converter is derived by integrating the step-down ac chopper and the output-voltage doubler. The proposed converter provides direct ac-dc conversion and dc output voltage without using any full-bridge diode rectifier. The step-down ac chopper using an active-clamp mechanism serves to clamp the voltage spike across the main switches and provides zero-voltage turn-on switching. The resonant-current path formed by the leakage inductance of the transformer and the resonant capacitor of the output-voltage doubler achieves the zero-current turn-off switching of the output diodes. The operation principle of the converter is analyzed and verified. A 500W prototype is implemented to show the performance of the proposed converter. The prototype provides maximum efficiency of 95.1% at the full load.

The X-ray Detection and morphology Characteristics on Evaporation Temperature of amorphous Selenium based digital X-ray detector (비정질 셀레늄의 박막 제조공정에 따른 미세구조와 IV특성)

  • Gong, H.G.;Cha, B.Y.;Lee, G.H.;Kim, J.H.;Nam, S.H.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.05b
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    • pp.51-54
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    • 2002
  • Recently, due to its better photosensitivity in X-ray, the amorphous selenium based photoreceptor is used on digital direct method conversion material. Compared to other photoconductive material, amorphous selenium has good X-ray response characteristic and low leakage current. It has many parameters of detecting X-ray response on selenium. Among of them, it is well known that manufacture of a-Se is the most basic element. In this paper, we fabricated two types of amorphous selenium sample which had time variable. The one was fabricated continuous deposition sample and the other was step by step sample. Thickness of sample was $300{\mu}m$ and top electrode was evaporated gold. We investigated the leakage current and photo current of them and analysed their electrical characteristics. For analyzing morphology of samples, SEM and surface was pictured. We found that step by step deposition method could be applied for novel fabricating amorphous selenium film.

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The characteristic of leakage current in ZnO surge arrestor elements with mixed direct and 60Hz voltage (중첩전압(직류+교류 60Hz)에서 산화아연 피뢰기 소자의 누설전류 특성)

  • Lee, B.H.;Pak, K.Y.;Kang, S.M.;Choi, H.S.;Oh, S.K.
    • Proceedings of the KIEE Conference
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    • 2003.10a
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    • pp.186-188
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    • 2003
  • The ZnO surge arrester is the protective device for limiting surge voltages on equipment by diverting surge current and returning the device to its original status. The occurrence of overvoltage appears in any phase to AC power supply system and it appears in mixing AC and impulse voltages, moreover because HVDC power supply system uses converter in semiconductor, it makes mixed DC and high harmonics voltages. In this study, the various mixed AC and DC voltages was made for investigating the degradation effect of ZnO arrester according to mixed voltage. As a result, the increase of DC component to mixed voltages causes the increase of resistive component of total leakage current to ZnO block. In changing V-I curve for mixed voltages, the cross-over point acts a factor as making the proper capacitor size of an equivalent circuit for ZnO block.

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3-D Simulation of Nanoscale SOI n-FinFET at a Gate Length of 8 nm Using ATLAS SILVACO

  • Boukortt, Nour El Islam;Hadri, Baghdad;Caddemi, Alina;Crupi, Giovanni;Patane, Salvatore
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.3
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    • pp.156-161
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    • 2015
  • In this paper, we present simulation results obtained using SILVACO TCAD tools for a 3-D silicon on insulator (SOI) n-FinFET structure with a gate length of 8 nm at 300K. The effects of variations of the device’s key electrical parameters, such as threshold voltage, subthreshold slope, transconductance, drain induced barrier lowering, oncurrent, leakage current and on/off current ratio are presented and analyzed. We will also describe some simulation results related to the influence of the gate work function variations on the considered structure. These variations have a direct impact on the electrical device characteristics. The results show that the threshold voltage decreases when we reduce the gate metal work function Φm. As a consequence, the behavior of the leakage current improves with increased Φm. Therefore, the short channel effects in real 3-D FinFET structures can reasonably be controlled and improved by proper adjustment of the gate metal work function.

The characteristic study of hybrid X-ray detector using CdTe and Zns:AgCl phosphor (CdTe 와 ZnS:AgCl phosphor를 이용한 Hybrid형 X선 검출기의 특성연구)

  • Seok, Dae-Woo;Kang, Sang-Sik;Kim, Jin-Young;Park, Ji-Koon;Mun, Chi-Woong;Nam, Sang-Hee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05c
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    • pp.71-74
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    • 2003
  • Photoconductor for direct detection fiat-panel imager present a great materials challenge, since their requirement include high X-ray absorption, ionization and charge collection, low leakage current and large area deposition, CdTe is practical material. We report studies of detector sensitivity, That is an CdTe with $5{\mu}m$ thickness on glass. That is hybrid layer of depositting ZnS:AgCl phosphor with $100{\mu}m$ on CdTe. The leakage current of hybrid is similar to it of a-Se, but photocurrent is larger than a-Se. Both of them have high spatial resolution, but hybrid has higher sensitivity than a-Se at comparable bias voltage.

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Analysis on Installation Conditions Survey and Improvement of Drain Pump in Air-Conditioner : Focusing on Changwon City (에어컨 배수펌프 설치 실태 및 개선방안 분석 - 창원시를 중심으로)

  • Kim, Sung-Sam
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.26 no.8
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    • pp.102-106
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    • 2012
  • This paper was carried out to survey fire hazard and improvement at the drain pump in air-conditioners. Based on the results of analysis, the proposal of electrical accidents prevention and a construction improvement are as follows. A power connection of the drain pump has two types, an electrical outlet type and direct connection type at control board of air-conditioner. The electrical outlet types need a bulletin sign or education as malfunction of the drain pump include an additional accidents, current leakage and overflowing with water on the floor from breaker trip by exterior cause and breaker off by mistake of worker. On the other hand, the direct connection types prevent a power interruption as exterior cause, but it has some trouble, cut of ground cable and without protection device. Usually it doesn't work by electrician when air-conditioner and the drain pump power work. Therefore an education or countermeasures are recommended for not electrician. Generally malfunction of the drain pump causes accumulated materials into the tank. Even though the accumulated materials lead to an overheating and burning as failure of detector occur an idling, periodic inspection of the air-conditioner filter and the drain pump tank prevent the trouble.

Characterization of the Schottky Barrier Height of the Pt/HfO2/p-type Si MIS Capacitor by Internal Photoemission Spectroscopy (내부 광전자방출 분광법을 이용한 Pt/HfO2/p-Si Metal-Insulator-Semiconductor 커패시터의 쇼트키 배리어 분석)

  • Lee, Sang Yeon;Seo, Hyungtak
    • Korean Journal of Materials Research
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    • v.27 no.1
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    • pp.48-52
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    • 2017
  • In this study, we used I-V spectroscopy, photoconductivity (PC) yield and internal photoemission (IPE) yield using IPE spectroscopy to characterize the Schottky barrier heights (SBH) at insulator-semiconductor interfaces of Pt/$HfO_2$/p-type Si metal-insulator-semiconductor (MIS) capacitors. The leakage current characteristics of the MIS capacitor were analyzed according to the J-V and C-V curves. The leakage current behavior of the capacitors, which depends on the applied electric field, can be described using the Poole-Frenkel (P-F) emission, trap assisted tunneling (TAT), and direct tunneling (DT) models. The leakage current transport mechanism is controlled by the trap level energy depth of $HfO_2$. In order to further study the SBH and the electronic tunneling mechanism, the internal photoemission (IPE) yield was measured and analyzed. We obtained the SBH values of the Pt/$HfO_2$/p-type Si for use in Fowler plots in the square and cubic root IPE yield spectra curves. At the Pt/$HfO_2$/p-type Si interface, the SBH difference, which depends on the electrical potential, is related to (1) the work function (WF) difference and between the Pt and p-type Si and (2) the sub-gap defect state features (density and energy) in the given dielectric.

A Design of Direct conversion method 2.45GHz Low-IF Mixer Using CMOS 0.18um Process (CMOS 0.18um 공정을 이용한 2.45GHz Low-IF 직접 변환 방식 혼합기 설계)

  • Choi, Jin-Kyu;Kim, Hyeong-Seok
    • 한국정보통신설비학회:학술대회논문집
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    • 2008.08a
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    • pp.414-417
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    • 2008
  • This paper presents the design and analysis of 2.45GHz Low-IF Mixer using CMOS 0.18um. The Mixer is implemented by using the Gilbert-type configuration, current bleeding technique, and the resonating technique for the tail capacitance. And the design of this Double Balance Mixer is based on its lineaity since it is important in the interference cancellation system. The low flicker noise mixer is implemented by incorporating a double balanced Gilber-type configuration, the RF leakage-less current bleeding technique, and Cp resonating technique. The proposed mixer has a simulated conversion gain of 16dB a simulated IIP3 of -3.3dBm and P1dB is -19dBm. A simulated noise figure of 6.9dB at l0MHz and a flicker corner frequency of 510kHz while consuming only 10.65mW od DC power. The layout of Mixer for one-chip design in a 0.18-um TSMC process has 0.474mm$\times$0.39 mm size.

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Contact Stress Analysis of Stick Type Ignition Coil Jacket PET (Stick Type Ignition Coil Jacket PET의 접촉응력 해석)

  • Kim Yang-Sul
    • Journal of the Korean Society of Safety
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    • v.20 no.1 s.69
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    • pp.1-6
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    • 2005
  • Stick type ignition coil is new development that connect directly with ECU(Electronic control unit), without needing a spark plug cable and distributor. Glass-fiber reinforced ploymeric composites provide the desirable properties of high stiffness and strength as well as low specific weight. Stick type ignition coil jacket is using PBT CF30 resin. PBT CF30 resin is a kind of electric insulation which is a superior engineering plastic that is used to prevent the leakage of the electrical current. If PET receive a mistake of design or excessive force when HV terminal oppress on jacket, it can happen to crack. Local stress concentrations occurring on the contact surface, the contact phenomenon becomes a direct cause to the wear and failure of mechanical structures. When it is cracked, it can allow a leakage of the electrical current. So, in this study, we analyze the contact stress to PBT jacket using ANSYS program, when HV terminal oppress on jacket. We suppose PBT to be Jacket and we analyzed contact stress that happens in PET like PBT analysis method. We compared the use of PBT and PET.

On the Gate Oxide Scaling of Sub-l00nm CMOS Transistors

  • Seungheon Song;Jihye Yi;Kim, Woosik;Kazuyuki Fujihara;Kang, Ho-Kyu;Moon, Joo-Tae;Lee, Moon-Yong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.1 no.2
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    • pp.103-110
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    • 2001
  • Gate oxide scaling for sub-l00nm CMOS devices has been studied. Issues on the gate oxide scaling are reviewed, which are boron penetration, reliability, and direct tunneling leakage currents. Reliability of Sub-2.0nm oxides and the device performance degradation due to boron penetration are investigated. Especially, the effect of gate leakage currents on the transistor characteristics is studied. As a result, it is proposed that thinner oxides than previous expectations may be usable as scaling proceeds. Based on the gate oxide thickness optimization process we have established, high performance CMOS transistors of $L_{gate}=70nm$ and $T_{ox}=1.4nm$ were fabricated, which showed excellent current drives of $860\mu\textrm{A}/\mu\textrm{m}$ (NMOS) and $350\mu\textrm{A}/\mu\textrm{m}$ (PMOS) at $I_{off}=10\mu\textrm{A}/\mu\textrm{m}$ and $V_dd=1.2V$, and CV/I of 1.60ps (NMOS) and 3.32ps(PMOS).

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