• Journal of the Korean Society of Radiology
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• v.3 no.1
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• pp.5-9
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• 2009

The trend of Digital x-ray Detector research is to improve resolution of image and to embody large area imaging as well as dynamic moving imaging, etc. This research is divided with indirect conversion method and direct conversion method by radiation conversion process. Each conversion method has problems such as decrease of resolution from light scattering in indirect method case and not only low system stability but also difficult in dynamic moving imaging in direct method case. X-ray detector using liquid crystal has been researching to solve these problems, but it is difficulty in uniform injection of liquid crystal because of its structural properties. Therefore, this study suggests the structure which solves present problem. Also the possibility of suggested structure was investigated using simulation.

• Journal of Electrical Engineering and Technology
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• v.10 no.2
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• pp.529-538
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• 2015

Due to the high efficiency and compact mechanical structure, direct drive variable speed generators are used for power conversion in wind turbines. The wind energy conversion system (WECS) considered in this paper consists of a permanent magnet synchronous generator (PMSG), uncontrolled rectifier, dc-dc boost converter controlled with maximum power point tracking (MPPT) and adaptive hysteresis controlled voltage source inverter (VSI). For high utilization of the converter's power capability and stabilizing voltage and power flow, constant DC-link voltage is essential. Step and search MPPT algorithm which senses the rectified voltage ($V_{DC}$) alone and controls the same is used to effectively maximize the output power. The adaptive hysteresis band current control is characterized by fast dynamic response and constant switching frequency. With MPPT and adaptive hysteresis band current control in VSI, the DC link voltage is maintained constant under variable wind speeds and transient grid currents respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.3
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• pp.153-159
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• 2009

A CMOS frequency synthesizer for $5{\sim}6$ GHz UNII-band sub-harmonic direct-conversion receiver has been developed. For quadrature down-conversion with sub-harmonic mixing, octa-phase local oscillator (LO) signals are generated by an integer-N type phase-locked loop (PLL) frequency synthesizer. The complex timing issue of feedback divider of the PLL with large division ratio is solved by using multimodulus prescaler. Phase noise of the local oscillator signal is improved by employing the ring-type LC-tank oscillator and switching its tail current source. Implemented in a $0.18{\mu}m$ CMOS technology, the phase noise of the LO signal is lower than -80 dBc/Hz and -113 dBc/Hz at 100 kHz and 1MHz offset, respect-tively. The measured reference spur is lower than -70 dBc and the power consumption is 40 m W from a 1.8 V supply voltage.

• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.2228-2231
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• 2003

In this paper, a transcoding algorithm for the Selectable Mode Vocoder (SMV) and the G.723.1 speech coder via direct parameter transformation is proposed. In contrast to the conventional tandem transcoding algorithm, the proposed algorithm converts the parameters of one coder to the Other Without going through the decoding md encoding process. The proposed algorithm is composed of four parts: the parameter decoding, line spectral pair (LSP) conversion, pitch period conversion, excitation conversion and rate selection. The evaluation results show that the proposed algorithm achieves equivalent speech quality to that of tandem transcoding with reduced computational complexity and delay.

• ETRI Journal
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• v.36 no.1
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• pp.12-21
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• 2014

In this paper, we propose a new digital blind in-phase/quadrature-phase (I/Q) mismatch compensation technique for image rejection in a direct-conversion receiver (DCR). The proposed image-rejection circuit adopts DC offset cancellation and a sign-sign least mean squares (LMS) algorithm with a unique step size adaptation both for a fast and precise I/Q mismatch estimation. In addition, several performance-optimizing design considerations related to accuracy, speed, and hardware simplicity are discussed. The implementation of the proposed circuit in an FPGA results in an image-rejection ratio (IRR) of 65 dB, which is the best performance with modulated signals, along with an adaptation time of 0.9 seconds, which is a tenfold increase in the compensation speed as compared to previously reported circuits. The proposed technique will be a promising solution in the area of image rejection to increase both the speed and accuracy of future DCRs.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.3
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• pp.230-237
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• 2012

This paper proposes an active-clamp ac-dc converter with direct power conversion that has a simple structure and achieves high efficiency. The proposed converter is derived by integrating the step-down ac chopper and the output-voltage doubler. The proposed converter provides direct ac-dc conversion and dc output voltage without using any full-bridge diode rectifier. The step-down ac chopper using an active-clamp mechanism serves to clamp the voltage spike across the main switches and provides zero-voltage turn-on switching. The resonant-current path formed by the leakage inductance of the transformer and the resonant capacitor of the output-voltage doubler achieves the zero-current turn-off switching of the output diodes. The operation principle of the converter is analyzed and verified. A 500W prototype is implemented to show the performance of the proposed converter. The prototype provides maximum efficiency of 95.1% at the full load.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.10
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• pp.1104-1111
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• 2003

The paper presents an algorithm for the compensation of gain and phase imbalances to exist between I-phase and Q-phase signal at direct conversion receiver. We propose a gain and phase imbalances blind equalization compensation algorithm by using variable step-size adaptive loop at direct conversion receiver. The blind equalization schemes have trade-off between convergence speed and jitter effect for the compensation of gain and phase imbalance. We propose the variable step-size adaptive loop method, which varies the loop coefficients according to errors, for recovering these problem. By using variable step-size adaptive loops, we propose to speed up the convergence process and reduce the jitter effect and simulation results show that the algorithm compensates signal loss and speeds up convergence time.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.6
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• pp.61-70
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• 2003

In this paper, a transcoding algorithm for the Selectable Mode Vocoder (SMV) and the G.723.1 speech coder via direct parameter transformation is proposed. In contrast to the conventional tandem transcoding algorithm, the proposed algorithm converts the parameters of one coder to the other without going through the decoding and encoding process. The proposed algorithm is composed of four parts: the parameter decoding, line spectral pair (LSP) conversion, pitch period conversion, excitation conversion and rate selection. The evaluation results show that the proposed algorithm achieves equivalent speech quality to that of tandem transcoding with reduced computational complexity and delay.

• The Bulletin of The Korean Astronomical Society
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• v.37 no.2
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• pp.157.2-157.2
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• 2012

Direct-conversion receivers often suffer from a DC-offset that is a by-product of the direct conversion process to baseband. In general, a basic approach to reduce the DC-offset is to do simple average of the baseband signal and remove the DC by subtracting the average. However, this gives rise to a residual DC offset which degrades the performance when the receiver adopts the coding schemes with high coding rates such as 8-PSK. Therefore, more advanced methods should be additionally required for better performance. While the training sequences are basically designed to have good auto-correlation properties to facilitate the channel estimation, they may be not good for the simultaneous estimation of the channel response and the DC-offset. Also the DC offset compensation under a bad condition does not give good results due to the estimation error. Correspondingly, the proposed scheme employs the two important points. First, the training sequence codes are divided into two groups by MSE(Mean Squared Errors) for estimating the channel taps and then SNR calculated from each group is compared to predefined threshold to do fine DC-offset estimation. Next, ON/OFF module is applied for preventing performance degradation by large estimation error under severe channel conditions. The simulation results of the proposed scheme shows good performances compared to the existing algorithm. As a result, this scheme is surely applicable to the receiver design in many communications systems.

• Journal of Power Electronics
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• v.13 no.6
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• pp.964-974
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• 2013

A modified direct torque control (DTC) method based on torque angle is proposed for interior permanent-magnet synchronous motor (IPMSM) drivers used in electric vehicles (EVs). Given the close relationship between torque and torque angle, proper voltage vectors are selected by the proposed DTC method to change the torque angle rapidly and regulate the torque quickly. The amplitude and angle of the voltage vectors are determined by the torque loop and stator flux-linkage loop, respectively, with the help of the position of the stator flux linkage. Furthermore, to satisfy the torque performance request of EVs, the nonlinear dead-time of the invertor caused by parasitic capacitances is considered and compensated to improve steady torque performance. The stable operation region of the IPMSM DTC driver for voltage and current limits is investigated for reliability. The experimental results prove that the proposed DTC has good torque performance with a brief control structure.