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http://dx.doi.org/10.4218/etrij.14.0113.0320

A Fast and Precise Blind I/Q Mismatch Compensation for Image Rejection in Direct-Conversion Receiver  

Kim, Suna (Department of Electrical engineering, KAIST)
Yoon, Dae-Young (Department of Electrical engineering, KAIST)
Park, Hyung Chul (Department of Electronic and IT Media Engineering, Seoul National University of Science and Technology)
Yoon, Giwan (Department of Electrical engineering, KAIST)
Lee, Sang-Gug (Department of Electrical engineering, KAIST)
Publication Information
ETRI Journal / v.36, no.1, 2014 , pp. 12-21 More about this Journal
Abstract
In this paper, we propose a new digital blind in-phase/quadrature-phase (I/Q) mismatch compensation technique for image rejection in a direct-conversion receiver (DCR). The proposed image-rejection circuit adopts DC offset cancellation and a sign-sign least mean squares (LMS) algorithm with a unique step size adaptation both for a fast and precise I/Q mismatch estimation. In addition, several performance-optimizing design considerations related to accuracy, speed, and hardware simplicity are discussed. The implementation of the proposed circuit in an FPGA results in an image-rejection ratio (IRR) of 65 dB, which is the best performance with modulated signals, along with an adaptation time of 0.9 seconds, which is a tenfold increase in the compensation speed as compared to previously reported circuits. The proposed technique will be a promising solution in the area of image rejection to increase both the speed and accuracy of future DCRs.
Keywords
Image rejection; I/Q gain mismatch; I/Q phase mismatch; DC offset; direct-conversion receiver, DCR; low-IF; zero-IF; LMS algorithm; adaptive step size;
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  • Reference
1 B. Razavi, "Design Considerations for Direct-Conversion Receivers," IEEE Trans. Circuits Syst. II, Analog Dig. Signal Process, vol. 44, no. 6, June 1997, pp. 428-435.   DOI   ScienceOn
2 Y. Cheng, "The Influence and Modeling of Process Variation and Device Mismatch for Analog/RF Circuit Design," (invited) 4th IEEE Int. Caracas Conf. Devices, Circuits, Syst., Oranjestad, Aruba, Apr. 17-19, 2002, pp. D046:1-D046:8.
3 L.J. Breems, E.C. Dijkmans, and J.H. Huijsing, "A Quadrature Data-Dependent DEM Algorithm to Improve Image Rejection of a Complex Modulator," IEEE J. Solid-State Circuits, vol. 36, no. 12, Dec. 2001, pp. 1879-1886.   DOI
4 G.-T. Gil et al., "Joint ML Estimation of Carrier Frequency, Channel, I/Q Mismatch, and DC Offset in Communication Receivers," IEEE Trans. Veh. Technol., vol. 54, no. 1, Jan. 2005, pp. 338-349.   DOI
5 K. Haddadi et al., "Four-Port Communication Receiver with Digital IQ-Regeneration," IEEE Microw. Wireless Compon. Lett., vol. 20, no. 1, Jan. 2010, pp. 58-60.   DOI
6 L. Yu and W.M. Snelgrove, "A Novel Adaptive Mismatch Cancellation System for Quadrature IF Radio Receivers," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 46, no. 6, June 1999, pp. 789-801.   DOI   ScienceOn
7 C.C. Chen and C.-C. Huang, "On the Architecture and Performance of a Hybrid Image Rejection Receiver," IEEE J. Sel. Areas Commun., vol. 19, no. 6, June 2001, pp. 1029-1040.   DOI
8 S. Lerstaveesin and B.-S. Song, "A Complex Image Rejection Circuit with Sign Detection Only," IEEE J. Solid-State Circuits, vol. 41, no. 12, Dec. 2006, pp. 2693-2702.   DOI
9 L. Der and B. Razavi, "A 2-GHz CMOS Image-Reject Receiver with LMS Calibration," IEEE J. Solid-State Circuits, vol. 38, no. 2, Feb. 2003, pp. 167-175.   DOI
10 C.-H. Heng et al., "A CMOS TV Tuner/Demodulator IC with Digital Image Rejection," IEEE J. Solid-State Circuits, vol. 40, no. 12, Dec. 2005, pp. 2525-2535.   DOI   ScienceOn
11 G.-T. Gil, Y.-D. Kim, and Y.H. Lee, "Non-Data-Aided Approach to I/Q Mismatch Compensation in Low-IF Receivers," IEEE Trans. Signal Process., vol. 55, no. 7, July 2007, pp. 3360-3365.   DOI
12 I. Elahi, K. Muhammad, and P.T. Balsara, "I/Q Mismatch Compensation Using Adaptive Decorrelation in a Low-IF Receiver in 90-nm CMOS Process," IEEE J. Solid-State Circuits, vol. 41, no. 2, Feb. 2006, pp. 395-404.   DOI   ScienceOn
13 H. Yoshida, H. Tsurumi, and Y. Suzuki, "DC Offset Canceller in a Direct Conversion Receiver for QPSK Signal Reception," IEEE Int. Symp. Personal, Indoor, Mobile Radio Commun., Boston, MA, USA, Sept. 8-11, 1998, vol. 3, pp. 1314-1318.