• Journal of Information Processing Systems
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• v.15 no.3
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• pp.670-681
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• 2019

Orthogonal frequency division multiplexing (OFDM) is a system which is used to encode data using multiple carriers instead of the traditional single carrier system. This method improves the spectral efficiency (optimum use of bandwidth). It also lessens the effect of fading and intersymbol interference (ISI). In 1995, digital audio broadcast (DAB) adopted OFDM as the first standard using OFDM. Later in 1997, it was adopted for digital video broadcast (DVB). Currently, it has been adopted for WiMAX and LTE standards. In this project, a Verilog design is employed to implement an OFDM transmitter (DAC block) and receiver (FFT and ADC block). Generally, OFDM uses FFT and IFFT for modulation and demodulation. In this paper, 16-point FFT decimation-in-frequency (DIF) with the radix-2 algorithm and direct summation method have been analyzed. ADC and DAC in OFDM are used for conversion of the signal from analog to digital or vice-versa has also been analyzed. All the designs are simulated using Verilog on ModelSim simulator. The result generated from the FFT block after Verilog simulation has also been verified with MATLAB.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.4 s.334
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• pp.1-6
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• 2005

For the low power and low cost transceivers, direct sequence spread spec01m frequency-shift keying (DSSS-FSK) is proposed. A transmitter of the DSSS-FSK signal can be implemented by a simple direct modulation using the phase locked loop. Since the DSSS-FSK signal has negligible power around the carrier frequency, low cost direct conversion receiver can be used. Optimum coherent and semi-coherent correlation detection methods for the DSSS-FSK signal are proposed and analyzed. Segmented semi-coherent correlation detection method is proposed to improve the bit error rate performance in the large carrier frequency offset.

• ETRI Journal
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• v.29 no.4
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• pp.421-429
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• 2007

This paper presents a direct-conversion CMOS transceiver for fully digital DS-UWB systems. The transceiver includes all of the radio building blocks, such as a T/R switch, a low noise amplifier, an I/Q demodulator, a low pass filter, a variable gain amplifier as a receiver, the same receiver blocks as a transmitter including a phase-locked loop (PLL), and a voltage controlled oscillator (VCO). A single-ended-to-differential converter is implemented in the down-conversion mixer and a differential-to-single-ended converter is implemented in the driver amplifier stage. The chip is fabricated on a 9.0 $mm^2$ die using standard 0.18 ${\mu}m$ CMOS technology and a 64-pin MicroLead Frame package. Experimental results show the total current consumption is 143 mA including the PLL and VCO. The chip has a 3.5 dB receiver gain flatness at the 660 MHz bandwidth. These results indicate that the architecture and circuits are adaptable to the implementation of a wideband, low-power, and high-speed wireless personal area network.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.12
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• pp.111-116
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• 2005

We propose a BASK (Binary Amplitude Shift Keying) system for Giga-bit Modem in millimeter band. The proposed system consists of a high speed shutter of the transmitter and a repeater of the receiver. The shutter of the proposed system is introduced for pulse shaping to improve the intersymbol interference (ISI). The repeater consists of several stage converters. A converter is constructed with a low pass filter and a limiter. The repeater can improve the signal-to-noise ratio (SNR) and make the rectangular pulse train. The proposed system is a simple system that uses conversion method without IF (Intermediate Frequency) process.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.975-976
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• 2006

The passive type RFID (Radio Frequency Identification) System using Surface Acoustic Wave (SAW) tag at 900 MHz in the range of more than 1 m was fabricated. To improve interrogation range of the system propose a method to increase isolation between transmitter and receiver. This method using a direct conversion architecture achieves a leakage rejection of 10 dB increased compared with conventional system. Measured interrogation range is more than 1 m.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.50 no.11
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• pp.801-807
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• 2022

In this paper, we propose an ultra compact S-Band PCM/FM telemetry transmitter. The equipment is compact, so it can be applied to a limited space and capable of stable data transmission was designed and manufactured even with specifications set differently for each operating environment and system. RF direct conversion structure is used for the miniaturization of equipment, an RF transmission board, Power distribution board, and a signal processing board were implemented on a single PCB, so that the function of the transmitter could be performed with a minimum device. According to the target specification, variable output of 1~10W and variable data rate of 390kbps~12.5Mbps is possible in S-Band(2,200~2,400MHz) without degradation of performance. To verify the performance of the equipment, the RF performance test and BER measurement test were performed after the equipment was manufactured. It was confirmed that the OBW, null-to-null bandwidth, 1st IMD, Spurious emission, Phase noise specification of the PCM/FM modulated signal which is presented by the IRIG standard were satisfied, and we can confirm the data received using the transmitter inspection equipment were transmitted normally without distortion.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.7 s.98
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• pp.671-680
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• 2005

The CFL linearisation chip which is one of key devices in ultra-narrowband mobile radio transmitter using CQPSK digital modulation method is designed and implemented with $0.35{\mu}m$ CMOS technology. The reduced size and low cost of transmitter are available by the use of direct-conversion and CFL ASIC chip, which improve the power effi챠ency and linearity of transmitting path. In addition, low power operation is possible through CMOS technology The performance test results of transmitter show -25 dBc improvement of IMD level at the 3 kHz frequency offset and then satisfy FCC 47 CFR 90.210 E emission mask in the operation of CFL ASIC chip. At that time, the transmitting power is about PEP(Peak-to-Envelope Power) 5 W. The main parameters to improve the transmitting characteristic and to compensate the distortion in feed back loop such as DC-offset, loop gain and phase value are interfaced with notebook PC to be controlled with S/W.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10A
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• pp.969-979
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• 2002

This paper proposes an novel method of minimizing Interference which causes data decision error in digital wireless communications. In this method, in order to suppress ISI which is caused by the phase difference between the transmitted and received signal phases, the transmitted and received signals are always kept orthogonal by compensating the transmitted signal for detecting the phase noise and the delay of the received signal was implemented by MOS circuits. To delay the phase of the signal, additive white Gaussian noise (AWGN) environment was used. The phase and delay of the signal transmitted through AWGN channel were compensated in the modulator of the transmitter and the compensated signal was demodulated using quasi-direct conversion receiver and QPSK demodulator. ISI suppression was achieved by keeping the orthogonality between the compensated transmitted signal and the receive signal. The error probability of data decision was compared. By simulation the proposed system was proved to be effective in minimizing the ISI.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.4
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• pp.381-388
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• 2015

In this paper, a wireless video streaming system is designed and implemented for TV white space applications. It consists of a RF transceiver module, a digital modem, a camera, and a LCD screen. A VGA resolution video is captured by a camera, modulated by modem, and transmitted by RF transceiver module, and finally displayed at a destination 2.6-inch LCD screen. The RF transceiver is based on direct-conversion architecture. Image leakage is improved by low pass filtering LO, which successfully covers the TVWS. Also, DC offset problem is solved by current steering techniques which control common mode level at DAC output node. The output power of the transmitter and the minimum sensitivity of the receiver is +10 dBm and -82 dBm, respectively. The channel bandwidth is tunable among 6, 7 and 8 MHz according to regulations and standards. Digital modem is realized in Kintex-7 FPGA. Data rate is 9 Mbps based on QPSK and 512ch OFDM. A VGA video is successfully streamed through the air by using the developed TV white-space RF communication module.