• 제목/요약/키워드: Digital time delay

검색결과 435건 처리시간 0.027초

Comparison of TDC Circuit Design Method to Constant Delay Time

  • Choi, Jin-Ho
    • Journal of information and communication convergence engineering
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    • 제8권4호
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    • pp.461-465
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    • 2010
  • This paper describes the design method of Time-to-Digital Converter(TDC) to obtain the constant delay time and good reliability. The reliability property is described with delay elements. In TDC the time signal is converted to digital value which is based on delay elements for the time interpolation. To obtain the constant delay time, the first and the last delay elements have different structure compared to the middle delay elements. In the first and the last delay elements, the driving ability could be controlled for the different delay time. The delay element can be designed by analog and digital devices. The delay time of the element using analog devices is not sensitive to process parameters than that of the element using digital devices. And the TDC circuit by the elements using analog devices shows better reliability than that by the elements using digital devices also.

Duty Ratio Predictive Control Scheme for Digital Control of DC-DC Switching Converters

  • Sun, Pengju;Zhou, Luowei
    • Journal of Power Electronics
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    • 제11권2호
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    • pp.156-162
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    • 2011
  • The control loop time delay caused by sampling, the zero-order-holder effect and calculations is inevitable in the digital control of dc-dc switching converters. The time delay will limit the bandwidth of the control loop and therefore degrade the transient performance of digital systems. In this paper, the quantization time delay effects with different time delay values based on a generic second-order system are analyzed. The conclusion that the bandwidth of digital control is reduced by about 20% with a one cycle delay and by 50% with two cycles of delay in comparison with no time delay is obtained. To compensate the time delay and to increase the control loop bandwidth, a duty ratio predictive control scheme based on linear extrapolation is proposed. The compensation effect and a comparison of the load variation transient response characteristics with analogy control, conventional digital control and duty ratio predictive control with different time delay values are performed on a point-of-load Buck converter by simulations and experiments. It is shown that, using the proposed technique, the control loop bandwidth can be increased by 50% for a one cycle delay and 48.2% for two cycles of delay when compared to conventional digital control. Simulations and experimental results prove the validity of the conclusion of the quantization effects of the time delay and the proposed control scheme.

Delay Time Reliability of Analog and Digital Delay Elements for Time-to-Digital Converter

  • Choi, Jin-Ho
    • Journal of information and communication convergence engineering
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    • 제8권1호
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    • pp.103-106
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    • 2010
  • In this paper, the delay times were evaluated to develop highly reliable time-to-digital converter(TDC) in analog and digital delay element structures. The delay element can be designed by using current source or inverter. In case of using inverter, the number of inverter has to be controlled to adjust the delay time. And in case of using current source, the current for charging and discharging is controlled. When the current source is used the delay time of the delay element is not sensitive with varying the channel width of CMOS. However, when the inverter is used the delay time is directly related to the channel width of CMOS. Therefore to obtain good reliability in TDC circuit the delay element using current source is more stable compared to inverter in the viewpoint of the variation of fabrication process.

Real-Time Digital Fuzzy Control Systems considering Computing Time-Delay

  • Park, Chang-Woo;Shin, Hyun-Seok;Park, Mig-Non
    • 한국지능시스템학회논문지
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    • 제10권5호
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    • pp.423-431
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    • 2000
  • In this paper, the effect of computing time-delay in the real-time digital fuzzy control systems is investigated and the design methodology of a real-time digital fuzzy controller(DFC) to overcome the problems caused by it is presented. We propose the fuzzy feedback controller whose output is delayed with unit sampling period. The analysis and the design problem considering computing time-delay is very easy because the proposed controller is syncronized with the sampling time. The stabilization problem of the digital fuzzy control system is solved by the linear matrix inequality(LMI) theory. Convex optimization techniques are utilized to find the stable feedback gains and a common positive definite matrix P for the designed fuzzy control system Furthermore, we develop a real-time fuzzy control system for backing up a computer-simulated truck-trailer with the consideration of the computing time-delay. By using the proposed method, we design a DFC which guarantees the stability of the real time digital fuzzy control system in the presence of computing time-delay.

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디지틀 PIC 제어시스템의 계산 지연 영향 분석 (Analysis of computational delay effect on digital PID control system)

  • 이상정;홍석민;윤기준
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1990년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 26-27 Oct. 1990
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    • pp.529-533
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    • 1990
  • This paper treats the computational time delay issue in designing digital control systems. The computational time delay margin, within which the closed-loop stability is guaranteed, is analyzed using Rouche theorem. A PID control algorithm is proposed for compensating the computational time delay. Finally, the analyzed and the exact computational time delay margins are compared, and the performance of the proposed PID controller is shown through an illustrative example.

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공간 기준 디지털 도파관 모델의 지연 특성과 합성음의 음질 (Delay Characteristics and Sound Quality of Space Based Digital Waveguide Model)

  • 강명수;김규년
    • 한국음향학회지
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    • 제22권8호
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    • pp.680-686
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    • 2003
  • 디지털 도파관 모델은 악기의 물리적 모델링에 사용되는 일반적인 방법이다. 디지털 도파관 모델에서 파동의 움직임은 시간 또는 공간을 기준으로 해석 가능하다. 음의 샘플링이 시간을 기준으로 이루어지므로 악기 모델은 시간에 의한 파동의 움직임으로 묘사되는 것이 일반적이다. 본 논문에서는 현에 대한 공간 기준의 디지털 도파관 모델에 악기 몸체 모델을 추가해 악기 음을 합성하였다. 그렇게 함으로써 합성 음의 음질을 향상시키고 악기 모델의 음색 조절 변수들을 효과적으로 처리할 수 있었다. 공간 기준 샘플링에서 현 및 몸체에서 발생하는 미소 지연 오차에 대해 설명하고 FD (Fractional Delay) 필터를 이용해 미소 지연을 처리하는 방법을 보였다. 그리고 지연에 수에 따른 합성음의 변화를 설명하고 그 결과를 시간 기준 디지털 도파관 모델과 비교하였다.

Time-Delayed and Quantized Fuzzy Systems: Stability Analysis and Controller Design

  • Park, Chang-Woo;Kang, Hyung-Jin;Kim, Jung-Hwan;Park, Mignon
    • Transactions on Control, Automation and Systems Engineering
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    • 제2권4호
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    • pp.274-284
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    • 2000
  • In this paper, the design methodology of digital fuzzy controller(DFC) for the systems with time-delay is presented and the qualitative effects of the quantizers in digital implementation of a fuzzy controllers are investigated. We propose the fuzzy feed-back controller whose output is delayed with unit sampling period and period and predicted. the analysis and the design problem considering time-delay become very easy because the proposed controller is syncronized with the sampling time. The stabilization problem of the digital fuzzy system with time-delay is solved by linear matrix inequality(LMI) theory. Furthermore, we analyze the stability of the quantized fuzzy system. Our results prove that when quantization os taken into account, one only has convergence to some small neighborhood about origin. We develop a fuzzy control system for backing up a computer-simulated truck-trailer with the consideration of time-delay and quantization effect. By using the proposed method, we analyze the quantization effect to the system and design a DFC which guarantees the stability of the control system in the presence of time-delay.

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Characteristic of High Voltage Aging in AC PDPs

  • Lee, Yong-Han;Kim, Oe-Dong;Ahn, Byoung-Nam;Choi, Kwang-Yeol;Kim, Sung-Tae
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.932-934
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    • 2006
  • A relationship between discharge delay time and the aging method were investigated: A-Y (Address electrode - Scan electrode) aging and conventional X-Y(Common electrode - Scan electrode) aging with the variation of sustain voltage beyond self-erasing discharge. Although A-Y aging decreases discharge delay time, it has several drawbacks like non-uniformity of discharge, degradation of luminous efficiency and a color temperature. In a conventional aging condition which is carried out near the mid-margin voltage, discharge delay time is short in low voltage and high frequency condition. As an alternative to conventional voltage aging, high voltage aging is suggested which is carried out at self-erasing sustain voltage region. High voltage aging shows lower discharge delay time and fast aging speed than conventional voltage aging.

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A 12-bit Hybrid Digital Pulse Width Modulator

  • Lu, Jing;Lee, Ho Joon;Kim, Yong-Bin;Kim, Kyung Ki
    • 한국산업정보학회논문지
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    • 제20권1호
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    • pp.1-7
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    • 2015
  • In this paper, a 12-bit high resolution, power and area efficiency hybrid digital pulse width modulator (DPWM) with process and temperature (PT) calibration has been proposed for digital controlled DC-DC converters. The hybrid structure of DPWM combines a 6-bit differential tapped delay line ring-mux digital-to-time converter (DTC) schema and a 6-bit counter-comparator DTC schema, resulting in a power and area saving solution. Furthermore, since the 6-bit differential delay line ring oscillator serves as the clock to the high 6-bit counter-comparator DTC, a high frequency clock is eliminated, and the power is significantly saved. In order to have a simple delay cell and flexible delay time controllability, a voltage controlled inverter is adopted to build the deferential delay cell, which allows fine-tuning of the delay time. The PT calibration circuit is composed of process and temperature monitors, two 2-bit flash ADCs and a lookup table. The monitor circuits sense the PT (Process and Temperature) variations, and the flash ADC converts the data into a digital code. The complete circuits design has been verified under different corners of CMOS 0.18um process technology node.

네트워크 디지털 사이니지의 콘텐츠 다운로드 및 연속재생을 위한 최소 초기 지연시간 결정 (Determining a Minimum Initial Delay Time for Download & Seamless Playback of Multimedia Contents on Network Digital Signage)

  • 박영균;남영진;권영직
    • 한국산업정보학회논문지
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    • 제17권2호
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    • pp.33-43
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    • 2012
  • 디지털 사이니지란 멀티미디어 기반의 정보와 광고를 소비자에게 전달하는 스마트 전자 디스플레이 시스템을 일컫는다. 대부분의 디지털 사이니지는 일련의 멀티미디어 콘텐츠를 원격 네트워크 스토리지로부터 로컬 디스크로 다운로드 한 후에 재생을 시작한다. 하지만 모든 콘텐츠를 다운로드 한 후 재생할 경우에 긴 초기 지연시간을 초래한다. 본 논문에서는 디지털 사이니지에서 이러한 초기 지연시간 문제를 정의하고, 주어진 네트워크 대역폭 및 멀티미디어 콘텐츠의 품질과 크기에 따라서 최소한으로 필요한 초기 지연시간을 계산하는 방법을 제시한다. 또한, 디지털 사이니지 상의 다양한 멀티미디어 콘텐츠들을 이용하여 본 제안 기법의 성능을 분석한다.