• Title/Summary/Keyword: Digital integrator

검색결과 75건 처리시간 0.031초

디지털 필터뱅크 기반 플렉서블 위성중계기를 위한 채널화 기법의 성능비교 연구 (Performance Comparison of Channelization Schemes for Flexible Satellite Transponder with Digital Filter Banks)

  • 이동훈;김기선
    • 한국군사과학기술학회지
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    • 제13권3호
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    • pp.405-412
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    • 2010
  • The purpose of this paper is to compare complexity and to assess flexibility of competing transponder architectures for satellite communication services. For performance comparison, we consider three channelization techniques: digital down converter(DDC) based on the use of the cascaded integrator-comb(CIC) filter, tuneable pipeline frequency transform(T-PFT) based on the tree-structure(TS) and variable oversampled complex-modulated filter banks(OCM-FB) based on the polyphase FFT(P-FFT). The comparison begins by presenting a basic architecture of each channelization method and includes analytical expressions of the number of multiplications as a computational complexity perspective. The analytical results show that DDC with CIC filter requires the heavy computational burden and the perfect flexibility. T-PFT based on the TS provides the almost perfect flexibility with the low complexity over DDC with the CIC filter for a large number of sub-channels. OCM-FB based on the P-FFT shows the high flexibility and the best computational complexity performance compared with other approaches.

Internal Model Control of UPS Inverter using Resonance Model

  • Park J. H.;Kim D. W.;Kim J. K.;Lee H. W.;Noh T. K.;Woo J. I.
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.184-188
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    • 2001
  • In this paper, a new fully digital control method for single-phase UPS inverter, which is based on the double control loop such as the outer voltage control loop and inner current control loop, is proposed. The inner current control loop is designed and implemented in the form of internal model control and takes the presence of computational time-delay into account. Therefore, this method provides an overshoot-free reference-to-output response. In the proposed scheme, the outer voltage control loop employing P controller with resonance model implemented by a DSP is introduced. The proposed resonance model has an infinite gain at resonant frequency, and it exhibits a function similar to an integrator for AC component. Thus the outer voltage control loop causes no steady state error as regard to both magnitude and phase. The effectiveness of the proposed control system has been demonstrated by the simulation and experimental results respectively.

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방사선 치료위치 검증을 위한 다이오드 검출기의 특성에 관한 연구 (A Study on Characteristics of Diode Detecter for Verification of Radiation Therapy)

  • 이동훈;김윤종;지영훈;이동한;홍승홍
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(5)
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    • pp.106-109
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    • 2000
  • The diode characteristics for therapy radiation sensor have been studied by irradiating therapy radiation from the MM22 microtron accelerator. Signal processing has been performed in the pulse mode which can process the signal fast. We have designed integrator, peak detector and synchronization circuit to detect diode signal in the pulse mode for implementation of portal image. We also read the diode signal by A/D board and displayed the peak value with LabView program. Because the quality of portal image obtained by film in the case of therapy radiation is much worse than that of diagnostic film, Digital radiography system by rectifier diode detector was suggested for portal Image.

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센서 시스템을 위한 저전력 시그마-델타 ADC (Low-Power Sigma-Delta ADC for Sensor System)

  • 신승우;권기백;박상순;최중호
    • 전기전자학회논문지
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    • 제26권2호
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    • pp.299-305
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    • 2022
  • 다양한 물리적 신호를 디지털 신호 영역에서 처리하기 위해서 센서의 출력을 디지털로 변환하는 아날로그-디지털 변환기 (ADC)는 시스템 구성에 있어 매우 중요한 구성 블록이다. 센서 신호 처리를 위한 아날로그 회로의 역할을 디지털로 변환하는 추세에 따라 이러한 ADC의 해상도는 높아지는 추세이다. 또한 ADC는 모바일 기기의 배터리 효율 증대를 위해서 저전력 성능이 요구된다. 기존 integrating 시그마-델타 ADC의 경우 고해상도를 가지는 특징이 있지만, 저전압 조건과 미세화 공정으로 인해 적분기의 연산증폭기 이득 오차가 증가해 정확도가 낮아지게 된다. 이득 오차를 최소화하기 위해 버퍼 보상 기법을 적용할 수 있지만 버퍼의 전류가 추가된다는 단점이 있다. 본 논문에서는 이와 같은 단점을 보완하고자 버퍼를 스위칭하며 전류를 최소화시키고, 하이패스 바이어스 회로를 통해 settling time을 향상시켜 기존과 동일한 해상도를 갖는 ADC를 설계하였다.

성능이 향상된 면적선량계(DAP) 개발 (Development of Enhanced DAP(Dose Area Product))

  • 이영지;이상헌;이승호
    • 전기전자학회논문지
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    • 제23권2호
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    • pp.739-742
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    • 2019
  • 본 논문에서는 성능이 향상된 면적선량계(DAP)를 제안한다. 본 논문에서 제안한 성능이 향상된 면적선량계는 기존에 개발되었던 면적선량계를 최적화하였다. 성능이 향상된 면적선량계는 전하 적분기 및 ADC 회로의 최적화 설계, RS-485 통신용 Line transceiver의 최적화 설계, Display 회로의 최적화 설계, 연동 및 에이징을 위한 PC 기반 제어 프로그램 최적화 등을 수행하였다. 제안된 시스템의 성능을 평가하기 위하여 공인시험기관에서 실험한 결과는 Radiation dose dependence와 Radiation quality dependence는 4.2%의 측정 불확도가 측정되어 국제 표준인 ${\pm}15%$ 이하에서 정상동작 됨이 확인되었다. Energy range/Tube voltage는 30~150kV 구간에서 반응이 확인되었다. 센서필드간 감도차이와 센서필드간 면적선량 감도차이는 4.3%의 측정 불확도가 측정되어 국제 표준인 ${\pm}15%$ 이하에서 정상동작 됨이 확인되었다. 면적선량계의 재현성을 측정하기 위하여 10회 반복하여 측정한 결과 0%로 확인되어서 IEC60580 권고 사항인 2% 이하에서 정상동작 됨이 확인되었다. Digital resolution은 시간당 기준선량에 대해 오차 범위 내에서 $0.01{\mu}Gy{\cdot}m^2$의 최소단위로 측정되는 것을 확인되었다.

태양 전지의 전압, 전류 동작점 제어를 이용한 아날로그 MPPT 설계 (The Design of the analog MPPT by the control of the operating point of a solar array voltage and current)

  • 박희성;박성우;장진백;장성수
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 2004년도 학술대회 논문집
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    • pp.255-258
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    • 2004
  • The SAR(Solar Array Regulator) of KOMPSAT(Korea Multi Purpose SATellite)-1, 2 regulates a photovoltaic power according to the duty ratio commands of the ECU. But the ECU has so many other jobs that it can not calculate the solar array condition immediately. It means the SAR cannot always generate the maximum power of a photovoltaic. Nowadays, the commercial photovoltaic systems are using a controller operated by digital processing. But the usage for satellite is not adaptable. It is not easy to find the processor of the space grade and the price is expensive. So in this paper, the simple analog MPPT(Maximum Power Point Tracking) algorithm is proposed for the small satellite in LEO. This algorithm does not need any calculation of power by multiplication of voltage and current md a measurement of the solar array temperature. It is consist of only two sample and hold circuits, two comparators, a flip-flop, and an integrator. The proposed MPPT algorithm is verified by the simulation and experimental.

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능동 자기예압 공기베어링 스테이지의 진동감쇠 제어 (Active Damping Control of an Air Bearing Stage with Magnetic Preloads)

  • 노승국;김수현;곽윤근;박천홍
    • 한국정밀공학회지
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    • 제30권12호
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    • pp.1321-1325
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    • 2013
  • In this paper, we proposed an air bearing stage with active magnetic preloads in vertical directions compensating motion errors and attenuating vibrations to improve dynamic characteristics. This preloaded design gives simpler configuration of the stage, and active control of preload can be used for compensating motion errors by feedforward method. To improve dynamic characteristics, vibration of the table is monitored by an accelerometer, and controlled by a DSP based digital controller with integrator and band pass filters for suppressing roll and pitch vibration modes. The modes were evaluated by measuring frequency response functions, and compared with compensated responses. This showed effective results for suppressing poorly damped regenerative vibration of air bearings.

ADSL 송수신단용 저역통과 능동필터 설계 (A Design of Lowpass Active Filter for ADLS Tx/Rx Stage)

  • 이근호
    • 한국음향학회지
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    • 제24권1호
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    • pp.38-42
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    • 2005
  • 기존의 음성신호와 다른 주파수 대역을 사용하여 데이터 통신이 가능한 ADSL 모뎀 송수신단의 CMOS 아날로그 저역 능동필터를 각각 설계하여 제안하였다. 설계된 필터는 2.5V의 저전압 동작이 가능하며, 각각의 설계사양에 따라 송신단에서는 138kHz의 차단주파수값을 갖는 저역통과 능동필터가 수신단에서는 1,100kHz의 차단주파수 특성을 갖는 저역통과능동필터가 설계 되었다. 이득과 단위이득주파수 특성 면에서 개선된 high-swing cascode방식의 저전압 능동소자가 필터를 설계하기 위한 기본 블록으로 이용되었다. 제안된 소자와 설계 제안된 필터는 $0.251{\mu}m\;CMOS\;n-well$ 공정 파라미터를 이용하여 그 특성이 검증되었다.

A New Soft-Fusion Approach for Multiple-Receiver Wireless Communication Systems

  • Aziz, Ashraf M.;Elbakly, Ahmed M.;Azeem, Mohamed H.A.;Hamid, Gamal A.
    • ETRI Journal
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    • 제33권3호
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    • pp.310-319
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    • 2011
  • In this paper, a new soft-fusion approach for multiple-receiver wireless communication systems is proposed. In the proposed approach, each individual receiver provides the central receiver with a confidence level rather than a binary decision. The confidence levels associated with the local receiver are modeled by means of soft-membership functions. The proposed approach can be applied to wireless digital communication systems, such as amplitude shift keying, frequency shift keying, phase shift keying, multi-carrier code division multiple access, and multiple inputs multiple outputs sensor networks. The performance of the proposed approach is evaluated and compared to the performance of the optimal diversity, majority voting, optimal partial decision, and selection diversity in case of binary noncoherent frequency shift keying on a Rayleigh faded additive white Gaussian noise channel. It is shown that the proposed approach achieves considerable performance improvement over optimal partial decision, majority voting, and selection diversity. It is also shown that the proposed approach achieves a performance comparable to the optimal diversity scheme.

A 3 ~ 5 GHz CMOS UWB Radar Chip for Surveillance and Biometric Applications

  • Lee, Seung-Jun;Ha, Jong-Ok;Jung, Seung-Hwan;Yoo, Hyun-Jin;Chun, Young-Hoon;Kim, Wan-Sik;Lee, Noh-Bok;Eo, Yun-Seong
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제11권4호
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    • pp.238-246
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    • 2011
  • A 3-5 GHz UWB radar chip in 0.13 ${\mu}m$ CMOS process is presented in this paper. The UWB radar transceiver for surveillance and biometric applications adopts the equivalent time sampling architecture and 4-channel time interleaved samplers to relax the impractical sampling frequency and enhance the overall scanning time. The RF front end (RFFE) includes the wideband LNA and 4-way RF power splitter, and the analog signal processing part consists of the high speed track & hold (T&H) / sample & hold (S&H) and integrator. The interleaved timing clocks are generated using a delay locked loop. The UWB transmitter employs the digitally synthesized topology. The measured NF of RFFE is 9.5 dB in 3-5 GHz. And DLL timing resolution is 50 ps. The measured spectrum of UWB transmitter shows the center frequency within 3-5 GHz satisfying the FCC spectrum mask. The power consumption of receiver and transmitter are 106.5 mW and 57 mW at 1.5 V supply, respectively.