• 한국정밀공학회지
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• 제23권11호
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• pp.68-77
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• 2006

Nowadays, the increasing global competition forces automobile manufacturer to increase quality and to reduce the cost and time for manufacturing planning. To solve these problems, automobile manufacturers try to apply digital manufacturing technologies. In this paper, a concept of method for planning the digital assembly system is proposed. Based on the requirements of assembly tasks obtained through product analysis, the function and sequence modeling for assembly process is executed using the IDEF0 and UML model. For implementation of digital assembly system, the selected components are modeled by using 3D CAD tools. According to the system configuration strategy, lots of the alternative solutions for the assembly system are generated. Finally, the optimal assembly system is chosen by the evaluation of the alternative solutions with TOPSIS(Technique for Order Preference by Similarity to Ideal Solution) method. According to proposed procedure, digital laser welding system is implemented in DELMIA.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 Ⅲ
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• pp.1483-1486
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• 2003

This paper describes design and implementation of the DIDL(Digital Item Declaration Language) parser and Session mobility in Digital Item Adaptation. The DIDL is a declaration language which is a uniform and flexible abstraction and interoperable schema for declaring Digital Items. Session mobility specifies a mechanism to preserve a user's current state of interaction with a Digital Item. In this paper, Session mobility is implemented through the DIDL. For session mobility, the XDI (context digital item) shall capture the configuration-state of a Content digital item, shich is defined by the state of Selection elements in DIDL.

• 대한전기학회논문지
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• 제35권2호
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• pp.47-54
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• 1986

Hardware implementation of a 32-channel MFC digital receiver has not been easy and simple, because it requires real time processing of PCM data. In this paper, we introduce a method of designing an MFC digital receiver compactly by the channel distribution method. We have implemented the MFC digital receiver to process many cnannels by distributing channels of the TDM input data directly to the commercial digital signal processor chips(NEC uPD7720), and by carrying out the modified Goertzel Algorithm. The design of low cost, reliable, high speed, and compact MFC receiver will be shown.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1991년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 22-24 Oct. 1991
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• pp.317-321
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• 1991

In recent years, the discrete-data and digital control systems have gained importance in all industies due in part to the advances made in microcomputers, as well as the advantages found in working with digital signals. So, the developments of the computer aided design packages to analysis, control law design and digital implementation of control systems are increasingly needed and those substantial technological improvements are now expected. In the paper, a real time control program package(RTCPP) for the implementation of digital control is developed by using C language. The digital controls for the feedfoward and feedback controllers such as PI(propotional and Integration) type, regulator and servo types can be implemented by an IBM PC compatible computer with some interface modules of A-D/D-A converter and RS-232C. The effectiveness of RTCPP is illustrated by the application controls for motor and magnetic levitation systems.

• 한국정보기술응용학회:학술대회논문집
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• 한국정보기술응용학회 2001년도 추계공동학술대회 논문자료집 정보화 젼략 패러다임의 변화에 대한 보기술의 대응
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• pp.115-115
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• 2001

• Journal of Electrical Engineering and Technology
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• 제10권4호
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• pp.1655-1666
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• 2015

This paper proposes a new approach of Field Programmable Gate Array (FPGA) controlled digital implementation of shunt active power filter (SAPF) under steady state and dynamic operations. Typical implementations of SAPF uses microprocessor and digital signal processor (DSP) but it limited for complex algorithm structure, absence of feedback loop delays and their cost can be exceed the benefit they bring. In this paper, the hardware resources of an FPGA are configured and implemented in order to overcome conventional microcontroller or digital signal processor implementations. This proposed FPGA digital implementation scheme has very less execution time and boosts the overall performance of the system. The FPGA controller integrates the entire control algorithm of an SAPF, including synchronous reference frame transformation, phase locked loop, low pass filter and inverter current controller etc. All these required algorithms are implemented with a single all-on chip FPGA module which provides freedom to reconfigure for any other applications. The entire algorithm is coded, processed and simulated using Xilinx 12.1 ISE suite to estimate the advantages of the proposed system. The coded algorithm is also defused on a single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype and experimental results thus obtained match with simulated counterparts under the dynamic state and steady state operating conditions.

• 한국멀티미디어학회논문지
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• 제20권5호
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• pp.808-826
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• 2017

Most of conventional DSS's(Digital Signage Systems) have been built based on LAMP framework. Recent researches have shown that MEAN or MERN stack framework is simpler, more flexible, faster and more suitable for web-based application than LAMP stack framework. In this paper, we propose a design and implementation of MEARN (ME(A+R)N) stack-based real-time digital signage system, MR-DSS, which supports handing real-time tasks like urgent/instant messaging, system status monitoring and so on, efficiently in addition to conventional digital signage CMS service tasks. MR-DSCMS, CMS of MR-DSS, is designed to provide most of its normal services by REST APIs and real-time services like urgent/instant messaging by Socket.IO base under MEARN stack environment. In addition to architecture description of components composing MR-DSS, design and implementation issues are clarified in more detail. Through experimental testing, it is shown that 1) MR-DSS works functionally well, 2) the networking load performance of MR-DSCMS's REST APIs is better compared to a well-known open source Xibo CMS, and 3) real-time messaging via Socket.IO works much faster than REST APIs.

• 한국디지털건축인테리어학회논문집
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• 제9권1호
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• pp.83-90
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• 2009

Building Information Modeling (BIM) has the great possibility of transforming the AEC industry. BIM will require increased information exchange and mutual collaboration between all stakeholders. BIM implementation and such increased collaboration can affect legal issues and contract provisions. And some legal issues accompanying BIM Implementation will be raised while a large change also comes in responsibility and role between all stakeholders. However, current standard agreement system is based on fragmented agreement between the architect and the owner, and between the owner and the contractor. Another legal obstacles and considerations associated with BIM implementation will be arose from BlM technology and use of BIM. AEC professionals in Korea have long utilized the standard agreement forms as well and look forward complementation of current standard agreement for BlM implementation. Such complement direction for the standard agreement will be examined by investigating the legal issues and overview comparison between AlA E202 and ConsensusDOCS 301.

• 디지털융복합연구
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• 제7권1호
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• pp.81-98
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• 2009

Understanding what lies beneath the relationship between ISP and its implementation is an significant area of inquiry in the ISP research. Through an empirical analysis and complementary case examples the current study examines this relationship at six different university sites which undergone both of these processes years from 1995 to 2001. The face-to-face, in-depth interviews were conducted to those participated in both of these processes. A questionnaire survey was also conducted to same participants to elevate the quality of the validity and reliability of the measures. Due to the limitation of the access to the data, it was not possible to compare how similar the final implementation outcomes are from what was originally planned in ISP to some sites. However the study finds that such organizational factors as management support, communication, and organizational culture at the ISP play an important role in the implementation process. This paper proposes that these organizational factors although little they seem to directly affect each individual elements in the implementation process, its latent impact is critical as a whole.

• Journal of Information Processing Systems
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• 제15권4호
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• pp.890-903
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• 2019

The single carrier frequency domain equalization (SC-FDE) technology is an important part of the broadband wireless access communication system, which can effectively combat the frequency selective fading in the wireless channel. In SC-FDE communication system, the accuracy of timing synchronization directly affects the performance of the SC-FDE system. In this paper, on the basis of Schmidl timing synchronization algorithm a timing synchronization algorithm suitable for FPGA (field programmable gate array) implementation is proposed. In the FPGA implementation of the timing synchronization algorithm, the sliding window accumulation, quantization processing and amplitude reduction techniques are adopted to reduce the complexity in the implementation of FPGA. The simulation results show that the algorithm can effectively realize the timing synchronization function under the condition of reducing computational complexity and hardware overhead.