• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.11
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• pp.1254-1264
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• 2008

This paper suggests an extended memory polynomial model that improves accuracy in modeling memory effects of RF power amplifiers(PAs), and verifies effectiveness of the suggested method. The extended memory polynomial model includes cross-terms that are products of input terms that have different delay values to improve the limited accuracy of basic memory polynomial model that includes the diagonal terms of Volterra kernels. The complexity of the memoryless model, memory polynomial model, and the suggested model are compared. The extended memory polynomial model is represented with a matrix equation, and the Volterra kernels are extracted using least square method. In addition, the structure of digital predistorter and digital signal processing(DSP) algorithm based on the suggested model and indirect learning method are proposed to implement a digital predistortion linearization. To verify the suggested model, the predicted output of the model is compared with the measured output for a 10W GaN HEMT RF PA and 30 W LDMOS RF PA using 2.3 GHz WiBro input signal, and adjacent-channel power ratio(ACPR) performance with the proposed digital predistortion is measured. The proposed model increases model accuracy for the PAs, and improves the linearization performance by reducing ACPR.

• ETRI Journal
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• v.32 no.4
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• pp.503-511
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• 2010

WiBro radio frequency (RF) repeater is used for solving the problem of partial shadow areas in the wireless communication field that uses time-division duplexing (TDD) mode. In this paper, a method to efficiently generate TDD signals for WiBro RF repeater is proposed and its digital circuit is implemented. A TDD signal is detected from RF signals transmitted/received to/from RF repeater and then inputted again into the RF repeater, so that it can operate normally. First, the envelope of downlink signals is detected and then clamped to extract the basic form of a TDD signal using an operational amplifier circuit. Next, the TDD signal is generated by restoring and filtering the shape which has been distorted by the wireless channel. The algorithm and system to acquire TDD signal are developed with a goal to have simple but powerful functions with as little cost as possible. The proposed method is implemented as an RF-digital integrated system and verified through the experiments under the same condition as actual WiBro service environment.

• Journal of Institute of Control, Robotics and Systems
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• v.12 no.9
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• pp.912-917
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• 2006

A strain gauge weight measuring instrumentation system was designed with RF sensor network facilities. In the sensor module system data conversion and a series of signal processing were totally equipped. 16 strain gauges are incoming sensors and each output of the strain gauge was amplified and filtered for proper analog signal processing. Several measuring instrumentation OP amps and general purposed OP amps were used. 12 bits A/D converters converted analog signals to digital bits and a PIC microprocessor controlled the 16 channels of strain gauges. RF RS232 modules were used for wireless communication between the PIC microprocessor and an Ethernet host far a remote sensor monitoring system development.

• Journal of the Korean Institute of Navigation
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• v.24 no.5
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• pp.443-450
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• 2000

Before some experiments were carried out with analog bandpass filter which used for filtering the noise included in sound source signal. And this filter was constituted by condenser, register and operational amplifier. Hut these elements made the phase characteristics to differentiate in each sensing channel and cause a little of measurement error. We made new measurement system that was substituted digital filter for the analog filter in order to develop the optimal system which could find the time delay between each sensors with high accuracy. This paper describes the new system's constitution and the function of each parts. Specially three digital filters were designed and applied to the digital signal processing Part. And a series of experiments were carried out with the source＇s distance 9.53meters and the random bearing interval within the limits of $0^{\circ}$ ~ $180^{\circ}$. As a result, we have recognized that the accuracy of measurements were differentiated by the methods what kind of digital filter were adopted. And we have confirmed the facts that IIR LPF was suitable for sound source's bearing measurement and FIR LPF reduced the range measurement error.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.9
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• pp.855-860
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• 2016

This study describes the design and implementation of digital Payload power supply. We materialized the interface of the PLDIU and power supply of a satellite bus, and minimized the potential for the occurrence of such erroneous operation circuit ESD through the WCA of the space environment. We designed a reliable power supply through simulation for a TID according to the vibration generated during the launch and space radiation environment, and found no problem in the function and performance through the test space environment after production.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.1
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• pp.1-9
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• 2012

A 10-b 500 MS/s A/D converter (ADC) with a hybrid calibration and error correction logic is described. The ADC employs a single-channel cascaded folding-interpolating architecture whose folding rate (FR) is 25 and interpolation rate (IR) is 8. To overcome the disadvantage of an offset error, we propose a hybrid self-calibration circuit at the open-loop amplifier. Further, a novel prevision digital error correction logic (DCL) for the folding ADC is also proposed. The ADC prototype using a 130 nm 1P6M CMOS has a DNL of ${\pm}0.8$ LSB and an INL of ${\pm}1.0$ LSB. The measured SNDR is 52.34-dB and SFDR is 62.04-dBc when the input frequency is 78.15 MHz at 500 MS/s conversion rate. The SNDR of the ADC is 7-dB higher than the same circuit without the proposed calibration. The effective chip area is $1.55mm^2$, and the power dissipates 300 mW including peripheral circuits, at a 1.2/1.5 V power supply.

• Journal of the Korean Magnetics Society
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• v.7 no.6
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• pp.327-333
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• 1997

We designed and constructed the high frequency magnetic characteristics measurement system to measure core loss, B-H curve, permeability of toroidal ferrite core, amorphous core and various materials for high frequency application. The system consists of universal equipments such as digitizing oscilloscope, signal generator, power amplifier, PC in order to make upgrade easily. The power source is composed of waveform synthesizer and power amplifier ranging from DC to 20 MHz, and output signal H and B from sample core are digitized by oscilloscope with sampling rate 1 GS/ s per channel. Computer controls power source and oscilloscope, reads data from oscilloscope, displays analyzed waveform and saves data with file. The entire procedures finishes within few seconds.

• The KIPS Transactions:PartA
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• v.11A no.2
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• pp.195-202
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• 2004

This paper introduces the design or parallel Pipeline high-speed analog-to-digital converter(ADC) for the high-resolution video applications which require very precise sampling. The overall architecture of the ADC consists of 4-channel parallel time-interleaved 10-bit pipeline ADC structure a]lowing 200MSample/s sampling speed which corresponds to 4-times improvement in sampling speed per channel. Key building blocks are composed of the front-end sample-and-hold amplifier(SHA), the dynamic comparator and the 2-stage full differential operational amplifier. The 1-bit DAC, comparator and gain-2 amplifier are used internally in each stage and they were integrated into single switched capacitor architecture allowing high speed operation as well as low power consumption. In this work, the gain of operational amplifier was enhanced significantly using negative resistance element. In the ADC, a delay line Is designed for each stage using D-flip flops to align the bit signals and minimize the timing error in the conversion. The converter has the power dissipation of 280㎽ at 3.3V power supply. Measured performance includes DNL and INL of +0.7/-0.6LSB, +0.9/-0.3LSB.

• Journal of Biomedical Engineering Research
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• v.25 no.4
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• pp.269-275
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• 2004

Different biological tissues have different values of electrical resistivity. In EIT (electrical impedance tomography), we try to provide cross-sectional images of a resistivity distribution inside an electrically conducting subject such as the human body mainly for functional imaging. However, it is well known that the image reconstruction problem in EIT is ill-posed and the quality of a reconstructed image highly depends on the measurement error. This requires us to develop a high-performance EIT system. In this paper, we describe the development of a 16-channel digital EIT system including a single constant current source, 16 voltmeters, main controller, and PC. The system was designed and implemented using the FPGA-based digital technology. The current source injects 50KHz sinusoidal current with the THD (total harmonic distortion) of 0.0029% and amplitude stability of 0.022%. The single current source and switching circuit reduce the measurement error associated with imperfect matching of multiple current sources at the expense of a reduced data acquisition time. The digital voltmeter measuring the induced boundary voltage consists of a differential amplifier, ADC, and FPGA (field programmable gate array). The digital phase-sensitive demodulation technique was implemented in the voltmeter to maximize the SNR (signal-to-noise ratio). Experimental results of 16-channel digital voltmeters showed the SNR of 90dB. We used the developed EIT system to reconstruct resistivity images of a saline phantom containing banana objects. Based on the results, we suggest future improvements for a 64-channel muff-frequency EIT system for three-dimensional dynamic imaging of bio-impedance distributions inside the human body.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.3
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• pp.192-198
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• 2021

The battery's State of Health (SOH) is a critical parameter in the process of battery use, as it represents the Remaining Useful Life (RUL) of the battery. Electrochemical Impedance Spectroscopy (EIS) is a widely used technique in observing the state of the battery. The measured impedance at certain frequencies can be used to evaluate the state of the battery, as it is intimately tied to the underlying chemical reactions. In this work, a low-cost portable EIS instrument is developed on the basis of the ARM Cortex-M4 Microcontroller Unit (MCU) for measuring the impedance spectrum of Li-ion battery packs. The MCU uses a built-in DAC module to generate the sinusoidal sweep perturbation signal. Moreover, it performs the dual-channel acquisition of voltage and current signals, calculates impedance using a Digital Lock-in Amplifier (DLA), and transmits the result to a PC. By using LabVIEW, an interface was developed with the real-time display of the EIS information. The developed instrument was suitable for measuring the impedance spectrum of the battery pack up to 1000 V. The measurement frequency range of the instrument was from 1 hz to 1 Khz. Then, to prove the performance of the developed system, the impedance of a Samsung SM3 battery pack and a Bexel pouch module were measured and compared with those obtained by the commercial instrument.