• Journal of Korean Society for Atmospheric Environment
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• v.23 no.E2
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• pp.66-73
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• 2007

The introduction of tracer gas techniques to ventilation studies in indoor environments provides valuable information that used to be unattainable from conventional testing environments. Data acquisition systems (DASs) containing analogue-to-digital (A/D) converters are usually used to function the key role that records signals to storage in digital format. In the testing process, there exist a number of components in the measuring equipment which may produce system-based inference to the monitored results. These unwanted fluctuations may cause significant error in data analysis, especially when non-linear algorithms are involved. In this study, a pre-processor is developed and applied to separate the unwanted fluctuations (noise or interference) in raw measurements and to reduce the uncertainty in the measurement. Moving average, notch filter, FIR (Finite Impulse Response) filters, and IIR (Infinite Impulse Response) filters are designed and applied to collect the desired information from the raw measurements. Tracer gas concentrations are monitored during leakage and ventilation tests in the model test room. The signal analysis functions are introduced to carry out the digital signal processing (DSP) work. Overall the FIR filters process the $CO_2$ measurement properly for ventilation rate and mean age of air calculations. It is found that, the Kaiser filter was the most applicable digital filter for pre-processing the tracer gas measurements. Although the IIR filters help to reduce the random noise in the data, they cause considerable changes to the filtered data, which is not desirable.

• Journal of Biomedical Engineering Research
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• v.22 no.3
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• pp.285-291
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• 2001

In this paper, we designed two preprocessing adaptive filter - high pass filter and notch filter - using FPGA. For minimizing the calculation load of multi-channel and high-resolution ECG system, we utilize FPGA rather than digital signal processing chip. To implement the designed filters in FPGA, we utilize FPGA design tool(Altera corporation, MAX-PLUS II) and CSE database as test data. In order to evaluate the performance in terms of processing time, we compared the designed filters with the digital filters implemented by ADSP21061(Analog Devices). As a result, the filters implemented by FPGA showed better performance than the filters based on ADSP21061. As a consequence of examination, we conclude that FPGA is a useful solution in multi-channel and high-resolution signal processing.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.107.1-107
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• 2001

In this paper, a digital signal processing circuit for Position Sensitive Detectors(PSDs) is introduced to substitute the conventional analog signal processing circuit and to compensate disadvantages of the PSD. In general, the analog circuits have the problems such as noise accumulation, sensitivity for environmental changes, and high cost for manufacturing. Moreover, the intrinsic nonlinearity problem of the PSD makes it hard to measure the position accurately because it is difficult to be overcome the problem by using the conventional analog circuits, which can be solved by using the digital signal processing circuit. The circuit is implemented by using a Field Programmable Gate Array (FPGA). The Pulse Amplitude Modulation(PAM) method is used for reducing the environmental noise effect, and a linear interpolation logic is used to compensate the ...

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.663-664
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• 2006

This paper presents a reconfigurable digital signal processing(rDSP) architecture that is effective for implementing adaptive digital signal processing in the applications of smart health care system. This rDSP architecture employs an evolution capability of FIR filters using genetic algorithm. Parallel genetic algorithm based rDSP architecture evolves FIR filters to explore optimal configuration of filter combination, associated parameters, and structure of feature space adaptively to noisy environments for an adaptive signal processing. The proposed DSP architecture is implemented using Xilinx Virtex4 FPGA device and SMIC 0.18um CMOS Technology.

• ETRI Journal
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• v.34 no.2
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• pp.256-259
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• 2012

The double-base number system has been used in digital signal processing systems for over a decade because of its fast inner product operation and low hardware complexity. This letter proposes an innovative multiplier architecture using hybrid operands. The multiplier can easily be linked to flash analog-to-digital converters or digital systems through a double-base number encoder (DBNE) for realtime signal processing. The design of the DBNE and the multiplier enable faster digital signal processing and require less hardware resources compared to the binary processing method.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.44-48
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• 2002

This paper describes an adaptive signal processing of digital receiver with DDC(Digital Down Convertor), DDC is implemented by using NCO(Numerically Controlled Oscillator), digital low pass filter. for the passband sampling, we present the results of digital receiver simulation with DDC. We confirm that the low IP signal is converted to zero IF by DDC. DOA(Direction Of Arrival) estimation technique using MUSIC(Multiple SIgnal Classification) algorithm with high resolution is presented. We Cow that an accurate resolution of DOA depends on the input sampling number.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.535-538
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• 2001

In this paper, we present a novel method to solve the inevitable RGB beam mismatch problem in projection TV receivers. Conventional methods solve the mismatch problem by directly controlling the cathode ray tube (CRT) using the convergence yoke (CY). Unlike conventional methods, the proposed method is based on digital video processing using image warping techniques. Firstly RGB beam projection paths are mathematically modeled. Then based on the modeling, the input video signal to CRT is prewarped so that RGB beams are landed at the same point on the screen. Since the proposed method is based on a digital video processing instead of using CY, it can outperform the conventional method in terms of quality and cost. The experimental results with a real 60´projection TV demonstrate that the proposed method indeed produces converged images on the projection TV screen.

• Journal of Sensor Science and Technology
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• v.26 no.3
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• pp.155-159
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• 2017

The analog-to-digital converter (ADC) is an important component in various fields of sensor signal processing. This paper presents an expandable flash analog-to-digital converter (E-flash ADC) for sensor signal processing using a comparator, a subtractor, and a multiplexer (MUX). The E-flash ADC was simulated and designed in $0.35-{\mu}m$ standard complementary metal-oxide semiconductor (CMOS) technology. For operating the E-flash ADC, input voltage is supplied to the inputs of the comparator and subtractor. When the input voltage is lower than the reference voltage, it is outputted through the MUX in its original form. When it is higher than the reference voltage, the reference voltage is subtracted from the input value and the resulting voltage is outputted through the MUX. Operation of the MUX is determined by the output of the comparator. Further, the output of the comparator is a digital code. The E-flash ADC can be expanded easily.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.5
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• pp.81-88
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• 2013

A low voltage circuit breaker protects electrical equipments from over current and short faults of system by cutting the power supply. The breaker use a thermal magnetic type trip device from the past. In recent years, electronic type relays are applied due to useful functions and services. The purpose of this development is full digitalizing of relay functions of a low voltage breaker. It includes separation of current sensor from current transformer, digital signal processing, high speed relaying, and voltage measuring for power meter. The suggestions are tested and implemented by making prototype and testing its all relay functions.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2003.06a
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• pp.110-113
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• 2003

In this paper, the multi-channel high speed data acquisition system is implemented. This high speed signal processing system for 3-D image display is applicable to the manipulation of a medical image processing, multimedia data and various fields of digital image processing. In order to convert the analog signal into digital one, A/D conversion circuit is designed. PCI interface method is designed and implemented, which is capable of transmission a large amount of data to computer. In order to, especially, channel extendibility of images acquisition, bus communication method is selected. By using this bus method, we can interface each module effectively. In this paper, 32-channel A/D conversion and PCI interface system for 3-dimensional and real-time display of the retina image is developed. The 32-channel image acquisition system and high speed data transmission system developed in this paper is applicable to not only medical image processing as 3-D representation of retina image but also various fields of industrial image processing in which the multi-point realtime image acquisition system is needed.