ETRI Journal

  • 제34권2호
  • /
  • Pages.256-259
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  • 2012
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  • 1225-6463(pISSN)
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  • 2233-7326(eISSN)
한국전자통신연구원 (Electronics and Telecommunications Research Institute)
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New Multiplier for a Double-Base Number System Linked to a Flash ADC

  • Nguyen, Minh-Son (Department of Computer Science and Engineering, Vietnam National University HCMC) ;
  • Kim, In-Soo (Department of Computer Science and Engineering, Pennsylvania State University) ;
  • Choi, Kyu-Sun (Department of Computer Science and Engineering, Pennsylvania State University) ;
  • Lim, Jae-Hyun (Samsung Electronics) ;
  • Choi, Won-Ho (Department of Electrical Engineering, University of Ulsan) ;
  • Kim, Jong-Soo (Department of Electrical Engineering, University of Ulsan)
  • 투고 : 2011.05.13
  • 심사 : 2011.08.17
  • 발행 : 2012.04.04
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초록

The double-base number system has been used in digital signal processing systems for over a decade because of its fast inner product operation and low hardware complexity. This letter proposes an innovative multiplier architecture using hybrid operands. The multiplier can easily be linked to flash analog-to-digital converters or digital systems through a double-base number encoder (DBNE) for realtime signal processing. The design of the DBNE and the multiplier enable faster digital signal processing and require less hardware resources compared to the binary processing method.

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참고문헌

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