Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A Reconfigurable Digital Signal Processing Architecture for the Evolvable Hardware System

진화 하드웨어 시스템을 위한 재구성 가능한 디지털 신호처리 구조

  • Lee, Han-Ho (School of Information and Communication Engineering Inha University) ;
  • Choi, Chang-Seok (School of Information and Communication Engineering Inha University) ;
  • Lee, Yong-Min (School of Information and Communication Engineering Inha University) ;
  • Choi, Jin-Tack (School of Information and Communication Engineering Inha University) ;
  • Lee, Chong-Ho (School of Information and Communication Engineering Inha University) ;
  • Chung, Duk-Jin (School of Information and Communication Engineering Inha University)
  • 이한호 (인하대학교 정보통신공학부) ;
  • 최창석 (인하대학교 정보통신공학부) ;
  • 이용민 (인하대학교 정보통신공학부) ;
  • 최진택 (인하대학교 정보통신공학부) ;
  • 이종호 (인하대학교 정보통신공학부) ;
  • 정덕진 (인하대학교 정보통신공학부)
  • Published : 2006.06.21
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Abstract

This paper presents a reconfigurable digital signal processing(rDSP) architecture that is effective for implementing adaptive digital signal processing in the applications of smart health care system. This rDSP architecture employs an evolution capability of FIR filters using genetic algorithm. Parallel genetic algorithm based rDSP architecture evolves FIR filters to explore optimal configuration of filter combination, associated parameters, and structure of feature space adaptively to noisy environments for an adaptive signal processing. The proposed DSP architecture is implemented using Xilinx Virtex4 FPGA device and SMIC 0.18um CMOS Technology.

Keywords