• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.6
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• pp.1061-1068
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• 2017

A RVDT is a sensor that measures angular displacement and the output signal of RVDT is a DSBSC-AM signal. For this reason, a DSBSC-AM demodulation processor is required to determine the angular displacement from the output signal. In this paper, DADC(Digital Angle to DC) which extracts the angular displacement from the output signal of a RVDT is implemented based-on modified Costas Loop usually used in the demodulation of DSBSC-AM signal by using FPGA. DADC can used with both 4-wire and 5-wire RVDTs and can exactly compensate the phase difference between the input excitation and output signals of a RVDT unlike the conventional analog RVDT signal conditioners which require external components. Since digital signal processing technique that can enhance the linearity is exploited, DADC shows 0.035% linearity error, which is smaller than 0.005% that of a conventional analog signal conditioner. The DADC are tested in an integrated experimental environment which includes a commercial RVDT sensor, ADC and an analog output block.

• Journal of the Institute of Convergence Signal Processing
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• v.3 no.3
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• pp.36-40
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• 2002

In this paper, we proposed a digital watermarking method based on the edge-wavelet transform to protect digital contents copyrights. We find out the optimal watermark insertion region and the proper amount of watermark in order to satisfy robustness and imperceptibility against various attacks such as noise, compression, collusion, clipping, scaling. Especially through this experiment, we could find out the adequate location of watermark insertion and proper amount of watermark and it is also viewed to satisfy robustness and imperceptibility in the lower frequency region with small watermark quantity.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.2
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• pp.151-158
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• 2004

In this paper, an inverse filtering technique for the digital filter model is proposed. This technique enables us to obtain a stable non-causal m inverse filter by transforming (approximating) it to a causal stable inverse system. In practice, a causal FIR approximation to this inverse filter is proposed. It can be shown that the impulse response of the inverse filter for all-pass systems is simply the mirror image of the impulse response for the system. Specially, due to this symmetric property of the impulse response of all-pass systems, the proposed technique is more useful for all-pass systems than other systems. In order to illustrate the proposed inverse filtering technique, four examples are presented. Two of them are for all-pass filters. The other two examples are for IIR and FIR filters. Also, computer simulations demonstrate that the proposed technique works very well.

• Journal of the Institute of Convergence Signal Processing
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• v.12 no.2
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• pp.139-144
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• 2011

The modern digital logic technology does not yet satisfy the speed requirements of real-time DSP circuits due to synchronized operation of multiplication and accumulation. This operation degrades DSP performance. Therefore, the double-base number system (DBNS) has emerged in DSP system as an alternative methodology because of fast multiplication and hardware simplicity. In this paper, authors propose a novel multiplication architecture. One operand is an output of a flash analog-to-digital converter (ADC) in DBNS format, while the other operand is a coefficient in the IEEE standard floating-point number format. The DBNS digital output from ADC is produced through a new double base number encoder (DBNE). The multiplied output is in the format of the IEEE standard floating-point number (FPNS). The proposed circuits process multiplication and conversion together. Compared to a typical multiplier that uses the FPNS, the proposed multiplier also consumes 45% less gates, and 44% faster than the FPNS multiplier on Spartan-3 FPGA board. The design is verified with FIR filter applications.

• Journal of Sensor Science and Technology
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• v.23 no.1
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• pp.7-14
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• 2014

Noncontact electrocardiogram (ECG) measurement using capacitive-coupled technique is a very reliable long-term noninvasive health-care remote monitoring system. It can be used continuously without interrupting the daily activities of the user and is one of the most promising developments in health-care technology. However, ECG signal is a very small electric signal. A robust system is needed to separate the clean ECG signal from noise in the measurement environment. Noise may come from many sources around the system, for example, bad contact between the sensor and body, common-mode electrical noise, movement artifacts, and triboelectric effect. Thus, in this paper, the extended Kalman filter (EKF) is applied to denoise a real-time ECG signal in capacitive-coupled sensors. The ECG signal becomes highly stable and noise-free by combining the common analog signal processing and the digital EKF in the processing step. Furthermore, to achieve ubiquitous monitoring, android-based application is developed to process the heart rate in a realtime ECG measurement.

• Journal of Sensor Science and Technology
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• v.32 no.4
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• pp.246-251
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• 2023

Internet of Things (IoT) systems process signals from various sensors using signal processing algorithms suitable for the signal characteristics. To analyze complex signals, these systems usually use signal processing algorithms in the frequency domain, such as fast Fourier transform (FFT), filtering, and short-time Fourier transform (STFT). In this study, we propose a multi-mode sensor signal processor (SSP) accelerator with an FFT-based hardware design. The FFT processor in the proposed SSP is designed with a radix-2 single-path delay feedback (R2SDF) pipeline architecture for high-speed operation. Moreover, based on this FFT processor, the proposed SSP can perform filtering and STFT operation. The proposed SSP is implemented on a field-programmable gate array (FPGA). By sharing the FFT processor for each algorithm, the required hardware resources are significantly reduced. The proposed SSP is implemented and verified on Xilinxh's Zynq Ultrascale+ MPSoC ZCU104 with 53,591 look-up tables (LUTs), 71,451 flip-flops (FFs), and 44 digital signal processors (DSPs). The FFT, filtering, and STFT algorithm implementations on the proposed SSP achieve 185x average acceleration.

• Journal of Information Processing Systems
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• v.13 no.2
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• pp.340-347
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• 2017

A watermark is a signal added to the original signal in order to preserve the copyright of the owner of the digital content. The basic challenge for designing a watermarking system is a dilemma between transparency and robustness. If we want a higher rate of transparency, there has to be a compromise in terms of its robustness and vice versa. Also, until now, watermarking is generalized, resulting in the need for a specialized algorithm to work for a specialized image processing application domain. Our proposed technique takes into consideration the image characteristics for watermark insertion and it optimizes transparency and robustness. It achieved a 99.98% retrieval efficiency for an image blurring attack and counterfeits other attacks. Our proposed technique counterfeits almost all of the image processing attacks.

• The Journal of the Acoustical Society of Korea
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• v.21 no.1E
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• pp.18-24
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• 2002

This paper discusses the development of an acoustic vector channel simulator for the performance analysis of an acoustic digital communication system. The channel simulator consists of transmission module, acoustic channel model, receiver, beamformer, and adaptive equalizer. The source signal (QPSK) is generated by the specified parameters. The transmitted signal generates multipath signals which have a different delay, amplitude and doppler frequency. The paper presents in details the approach to the performance analysis of an acoustic digital communication system according to the antenna structure and the various baseband signal processing techniques.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.7
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• pp.1014-1019
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• 2013

Signal processing techniques based on fractional order calculus have been successfully applied in analyzing heavy-tailed non-Gaussian signals. It was found that the surface EMG signals from the muscles having nuero-muscular disease are best modeled by using the heavy-tailed non-gaussian random processes. In this regard, this paper describes an application of digital fractional order lowpass differentiators(FOLPD, weighted FOLPD) based on the fractional order calculus in detecting peaks of surface EMG signal. The performances of the FOLPD and WFOLPD are analyzed based on different filter length and varying MUAP wave shape from recorded and simulated surface EMG signals. As a results, the WFOLPD showed better SNR improving factors than the existing WLPD and to be more robust under the various surface EMG signals.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.3
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• pp.418-424
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• 2014

A large number of wire rope has been used in various industries such as cranes and elevators. When wire used for a long time, wire defects occur such as disconnection and wear. It leads to an accident and damage to life and property. To prevent this accident, we proposed a wire rope fault detection system in this paper. We constructed the whole system choosing the leakage fault detection method using hall sensors and the method is simple and easy maintenance characteristics. Fault diagnosis and analysis were available through analog filter and amplification process. The amplified signal is transmitted to the computer through the data acquisition system. This signal could be obtained improved results through the digital filter process.