• Journal of Advanced Marine Engineering and Technology
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• 제30권3호
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• pp.444-448
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• 2006

In this paper, a frequency synthesizer for X-band FMCW radars is proposed. Some X-band FMCW radars have been used as a level sensor for tanker ship and the resolution of the level sensor may be mainly depend on linearity of frequency sweep. For a linear frequency sweep. the proposed synthesizer employs a phase-locked loop using prescalars and a high speed digital PLL chip. The measured results show that the linear frequency sweep range is from 10 GHz to 11 GHz and the output power of the synthesizer is minium 7 dBm. and the phase noise is about -80 dBc/Hz at 100 KHz offset from 11 GHz.

• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2006년도 전기학술대회논문집
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• pp.109-110
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• 2006

The performance of a digital baseband signal processing and data transmission rate depends on the modulation technique. In this paper, We implemented DSP communication system for Underwater acoustic communication using by adaptive BPSK modem technique. In order to implement adaptive modem, we suggested SNR detection block. SNR detection block has the reference SNR value that selects between window filter path and matched filter path. In this paper, suggested system is based on software interface and all Hardware(PLL, modem filter, equalizer etc) is implemented by software, exclusive of DSP, A/D, D/A converter, SDRAM and Flash memory.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1990년도 하계학술대회 논문집
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• pp.332-335
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• 1990

A digital phase-locked loop speed control system of a self-controlled permanent magnet synchronous mortar fed by a voltage source inverter is presented. This paper discribes the hardware and software design of the system. Variable speed control system for self-controlled permanent magnet synchronous motor is proposed. Simulation results demonstrate the validity of proposed methods. This proposed control technique is implemented by using a microprocessor-based system.

• 한국통신학회논문지
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• 제21권3호
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• pp.622-628
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• 1996

이 논문은 일반적인 75 ohm 동축 케이블을 사용한 새로운 직렬 전송 시스템을 묘사하였다. 일반적으로 병렬 25pin 케이블 과컨넥터는 HDVCR, D3VTR 및 HDTV 수신기와 같은 디지털 시스템에서 데이터의 전송 및 수신 등에 사용된다. 동축 케이블은 소비자 상품의 응용 및 방송 스튜디오에서 긴 신호 경로와 Switching등에 사용될 수 있다. 이 직렬 데이터 전송 기술은 200 feet 정도 떨어진 곳에서도 데이터의 전송 및 수신이 가능하며, 뿐만 아니라 RFPLL, SCRAMBLING, NRZI 등을 필요로 하지 않기 때문에 하드웨어가 간단하다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권4호
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• pp.247-255
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• 2011

This paper describes a CMOS outphasing transmitter using two wideband phase modulators. The proposed architecture can simplify the overall outphasing transmitter architecture using two-point phase modulation in phase-locked loop, which eliminates the necessity digital-to-analog converters, filters, and mixers. This architecture is verified with a WCDMA signal at 1.65 GHz. The prototype is fabricated in standard 130 nm CMOS technology. The measurement results satisfied the spectrum mask and 4.9% EVM performance.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 통신소사이어티 추계학술대회논문집
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• pp.77-80
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• 2003

We design the local oscillator system of the 100 GHz band radio receiving system for a cosmic radio observation. We use the YIG oscillator with digital driver which is the main oscillator. This oscillator has a good frequency and phase stability at some temperature variation, and the easy computer aided control characteristics. This total system designed to two subsystem, first is the oscillator system include YIG oscillator, tripler, harmonic mixer and triplexer etc., second is the PLL system to supply the precise and stable local oscillator frequency to mixer. The proposed local oscillator system in this paper can be use a single or multi pixel receiver because this system can be lock the local oscillator frequency automatically using PC.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.54-56
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• 2005

The paper proposes the solar photovoltaic power generation system method for photovoltaic system to solve the power shortage due the sudden power demand. So that supplied electric power to system at appearance during surplus electric power minute and unit moment link driving with common use system is available, digital PLL circuit system voltage through composition and phase of solar photovoltatic power generation system to do synchronization do. Feed forward controller was applied to get fast current response Solar cell that is changed by solar radiation always kept the maximum output when it used Step up chopper. The dynamic character had checked through simulation used Matlab Sumulink and confirmed through an experiment.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2007년도 하계학술대회 논문집
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• pp.441-443
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• 2007

In this paper, The authors design the current controller which independently control the d, q axis current transformed by the synchronously rotating d, q axis and a Space Vector Pulse Width Modulation(SVPWM) to steadily control the output DC-Link voltage against the variable load of the three phase PWM converter. Also, This study improves the high power factor, stability, and rapid response by the phase angle control using the digital Phase Locked Loop(PLL).

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권4호
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• pp.272-281
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• 2013

This paper presents low power frequency shift keying (FSK) transmitter using all digital PLL (ADPLL) for smart utility network (SUN). In order to operate at low-power and to integrate a small die area, the ADPLL is adopted in transmitter. The phase noise of the ADPLL is improved by using a fine resolution time to digital converter (TDC) and digitally controlled oscillator (DCO). The FSK transmitter is implemented in $0.18{\mu}m$ 1-poly 6-metal CMOS technology. The die area of the transmitter including ADPLL is $3.5mm^2$. The power consumption of the ADPLL is 12.43 mW. And, the power consumptions of the transmitter are 35.36 mW and 65.57 mW when the output power levels are -1.6 dBm and +12 dBm, respectively. Both of them are supplied by 1.8 V voltage source. The frequency resolution of the TDC is 2.7 ps. The effective DCO frequency resolution with the differential MOS varactor and sigma-delta modulator is 2.5 Hz. The phase noise of the ADPLL output at 1.8 GHz is -121.17 dBc/Hz with a 1 MHz offset.

• 한국통신학회논문지
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• 제32권8A호
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• pp.785-793
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• 2007

본 논문에서는 TP 케이블을 이용하여 100Mbps의 전송 속도를 지원하는 100Base-TX Ethernet 수신기의 디지털 신호 처리부를 제안하였다. 제안하는 디지털 신호 처리부는 자동 이득 조절기, 심볼 동기 복원기, 적응 등화기, BLW 보정기로 구성되어 있으며 초기 위상에 상관없이 150m까지 $10^{-12}BER$이하의 성능을 보였다. 제안하는 신호 처리부는 일부 블록을 제외한 모든 부분을 디지털로 구현하였으며 적응 등화기와 BLW 보정기 연동 구조는 기존의 적응 등화기 에러 값을 이용하는 구조에 비하여 MSE가 약 1dB정도의 성능 향상을 가져왔다. 설계한 디지털 신호 처리부는 Verilog-HDL로 구현되었으며 삼성 $0.18{\mu}m$ 라이브러리를 사용하여 합성 결과 동작 속도는 7.01ns 이며 총 게이트 수는 128.528 게이트였다.