• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.675-676
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• 2013

This paper presents a design method for multiple-output combinational digital logic systems using time domain based on multiplexing and common multi-terminal extension decision diagrams. The common multi-terminal extension decision diagrams represents extension valued multiple-output functions, while time domain based on multiplexing systems transmit several signals on a single lines. The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams, that is the common binary decision diagrams and common multi-terminal extension decision diagrams.

• Journal of Practical Engineering Education
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• v.10 no.1
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• pp.49-56
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• 2018

Various types of SW education are being operated by universities for non-major undergraduates. And most of them focus on educating computational thinking. Following this computing education, there is a need for an educational method that implements and evaluates creative computing outcomes for each student. In this paper, we propose a method to realize SW education based on creative computing artifacts. To do this, we propose an educational method for students to implement digital logic circuit devices creatively and design SW algorithms that implement the functions of their devices. The proposed training method teaches a simple LED logic circuit using an Arduino board as an example. Students creatively design and implement two pairs of two input logic circuit devices, and design algorithms that represent patterns of implemented devices in various forms. And they design the functional extension and extended algorithm using the input device. By applying the proposed method, non-major students can gain the concept and necessity of algorithm design through creative computing artifacts.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.9
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• pp.54-58
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• 2007

Development of high performance LTPS TFTs contributed to open up new SOP technology with various digital circuits integrated in display panels. This work introduces the current mode logic(CML) gate design method with which one can replace slow CMOS logic gates. The CML inverter exhibited small logic swing, fast response with high power consumption. But the power consumption became compatible with CMOS gates at higher clock speed. Due to small current values in CML, layout area is smaller than the CMOS counterpart even though CML uses larger number of devices. CML exhibited higher noise immunity thanks to its non-inverting and inverting outputs. Multi-input NAND/AND and NOR/OR gates were implemented by the same circuit architecture with different input confirugation. Same holds for MUX and XNOR/XOR CML gates. We concluded that the CML gates can be designed with few simple circuits and they can improve power consumption, chip area, and speed of operation.

• Journal of Digital Convergence
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• v.13 no.11
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• pp.321-329
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• 2015

The purpose of the present study is to understand the cultural aspects of the games through the logic and methods of phenomenological study for online games and to propose phenomenological research methods to many researchers performing various studies on the characteristics, addiction, culture, nature, features and types of the players. In particular, the way was investigated to study the game culture through the logic and methods of phenomenological study. Phenomenological research methods will help how to understand the game as a way to understand the cultural context of the specific and vivid life of gamers experience and human reality. This study is expected to inspire continuously more interesting and persistent phenomenological studies of many researchers with interests in the new research methods.

• Journal of Internet Computing and Services
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• v.16 no.4
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• pp.61-70
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• 2015

This paper presents a web-based Java applet for understanding the concepts in digital logic circuits and student satisfaction survey was carried out in order to show its educational validity. Through our educational Java applet, the learners will be capable of learning the concepts and principles related to digital logic circuit experiments and how to operate virtual experimental equipments and virtual bread board. The proposed educational Java applet is composed of five important components: Principle Classroom to explain the concepts and principles for digital logic circuit operations, Simulation Classroom to provide a web-based simulator to the learners, Virtual Experiment Classroom to provide interactive Java applet about the syllabus of off-line laboratory class, Assessment Classroom, and Management System. With the aid of the Management System every classroom is organically tied together collaborating to achieve maximum learning efficiency. Finally, we have obtained several affirmative effects such as high learning standard, reducing the total experimental hours and the damage rate for experimental equipments.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.1
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• pp.89-94
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• 2009

This paper proposes the algorithms that design the highly digital logic circuit and assign the code to each node of DCG(Directed Cyclic Graph) of length ${\zeta}$. The conventional algorithm have some problems, so this paper introduce the matrix equation from DCG of length ${\zeta}$ and proposes highly digital logic circuit design algorithms according to the DCG of length ${\zeta}$. Using the proposed circuit design algorithms in this paper, it become realized that was able to design from former algorithm. Also, making a comparison between the circuit using former algorithm and this paper's, we testify that proposed paper's algorithm is able to realize more optimized circuit design. According to proposed circuit design algorithm in this paper, it is possible to design current that DCG have natural number, so it have the following advantages, reduction of the circuit input/output digits, simplification of circuit composition, reduction of computation time and cost. And we show comparability and verification about this paper's algorithm.

• Journal of Advanced Navigation Technology
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• v.24 no.4
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• pp.314-321
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• 2020

Logic automated stimulus and response (LASAR) software is an automatic test program development tool for logic function test and fault detection of avionics components digital circuit cards. LASAR software needs to the information for the logic circuit function and input and output of the device. If there is no component information, normal component modeling is impossible. In this paper, component modeling is carried out through reverse design of programmable logic device (PLD) device without element information. The developed LASAR program identified failure detection rates through fault simulation results and single-seated fault insertion methods. Fault detection rates have risen by 3% to 91% for existing limited modeling and 94% for modeling through the reverse design. Also, the 22 case of stuck fault with the I/O pin of EP310 PLD were detected 100% to confirm the good performance.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.6
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• pp.1203-1208
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• 2016

For young children who are not spontaneous or not accurate in verbal communication of their emotions and experiences, drawing is a good means of expressing their status in mind and thus drawing analysis with chromatics is a traditional tool for art therapy. Recently, children enjoy digital drawing via painting tools thus there is a growing needs to develop an automatic digital drawing analysis tool based on chromatics and art therapy theory. In this paper, we propose such an analyzing tool based on dominant color analysis. Technically, we use ART2 clustering and fuzzy logic to understand the fuzziness of subjects' status of mind expressed in their digital drawings. The frequency of color usage is fuzzified with respect to the membership functions. After applying fuzzy logic to this fuzzified central vector, we determine the dominant color and supporting colors from the digital drawings and children's status of mind is then analyzed according to the color-personality relationships based on Alschuler and Hattwick's historical researches.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.687-688
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• 2011

This paper presents a design method for combinational digital logic systems using time domain based multiplexing(TDBM) and common multi-terminal extension decision diagrams(CMTEDD). The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams(DDs), that is the common binary decision diagrams(CBDDs) and CMTEDDs. Also, we propose an algorithms to derive common multiple-terminal binary decision diagrams(CMTBDD) from CBDDs, and CMTEDDs from CMTBDDs. The CMTEDDs over CBDDs is more compactness in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the logic design, each non-terminal nodes of an CBDDs and an CMTEDDs is realized by a multiplexer(MUX). In addition, we compare the proposed TDBM realization with the conventional one.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.36T no.3
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• pp.94-100
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• 1999

In this paper, we are implemented the courseware targets to the integrated a digital system analysis, a design theory, and a hardware description language training and a logic analysis. This paper consists of two subjects. One is that the learning of a digital system analysis, that of a design theory, and the training of a hardware description language is simultaneously performed. The other is that the experiment of courseware. To learn the hardware description language, the explanation using sound or moving images, setting-up of a simulation or a synthesis program, and simulating are executed on a courseware. And also, we proposed an integrated systems for the hardware description language and a logic synthesis. Also, The reliablity of the tool was verified to be preyed an efficient operation of an implemented digital system courseware tool by korea computer research association.