• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.4 s.346
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• pp.38-48
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• 2006

In this paper, we developed a hardware architecture of Reed-Solomon RS(255,239) decoder for the DMB mobile terminals. The DMB provides multimedia broadcasting service to mobile terminals, hence it should have small dimension for low power and short decoding delay for real-time processing. We modified Euclid algorithm to apply it to the key equation solving which is the most complicated part of the RS decoding. We also designed a small finite field divider to avoid the use of large Inverse-ROM table, and it consumed 17 clocks. After synthesis with Synopsis on Samsung STD130 $0.18{\mu}m$ Standard Cell library, the Euclid block had 30,228 gates and consumed 288 clocks, which gave the 25% reduced area compared to other existing designs. The size of the entire RS decoder was about 45,000 gates.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.4 s.346
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• pp.56-65
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• 2006

The Quantum-dot Cellular Automata (QCA) can be considered as a candidate for the next generation digital logic implementation technology due to their small feature sizes and ultra low power consumption. Up to now, several designs using Uh technology have been proposed. However, we found not all of the designs function properly. Furthermore, no general design guidelines have been proposed so far. A straightforward extension of a simple functional design pattern may fail. This makes designing a large scale circuits using QCA technology an extremely time-consuming process. In this paper, we show several critical vulnerabilities related to unbalanced input paths to QCA gates and sneak noise paths in QCA interconnect structures. In order to make up the vulnerabilities, a disciplinary guideline will be proposed. Also, we present a fast adder which has been designed by the discipline, and verified to be functional by the simulation.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.9
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• pp.36-44
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• 2015

This paper proposes a low-complexity processor to correct vignetting and barrel distortion for wide-angle cameras. The proposed processor calculates the required correcting factors by employing the piecewise linear approximation so that the hardware complexity can be reduced significantly while maintaining correction quality. In addition, the processor is designed to correct the two distortions concurrently in a singular pipeline, which reduces the overall complexity. The proposed processor is implemented with 18.6K logic gates in a $0.11{\mu}m$ CMOS process and shows the maximum correction speed of 200Mpixels/s for correcting an image of which size is $2048{\times}2048$.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.3 no.4
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• pp.73-80
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• 2004

A dual purpose robot automation system is developed for both arc welding and spot welding by one robot within a cell. The need for automation of both arc welding and spot welding processes is urgent while the production volume is not so big as to accommodate separate station for the two processes. Also, space is too narrow for separate station to be settled down in the factory. A spot welding robot is chosen and the function for arc welding are implemented in-house at cost of advanced functions. For the spot welding, a single pole type gun is used and the robot has to push down the plate to be welded, which causes the robot positioning error. Therefore, position error compensation algorithm is developed. The basic functions for the arc welding processes are implemented using the digital I/O board of robot controller, PLC, and A/D conversion PCB. The weaving pattern is taught in meticulously by manual teach. A fixture unit is also developed for dual purpose. The main aspects of the system is presented in this paper especially in the design and implementation procedure. The signal diagrams and sequence logic diagrams are also included. The outcome of the dual purpose welding cell is the increased productivity and good production stability which is indispensable for production volume prediction. Also, it leads to reduction of manufacturing lead time.

• The Journal of the Korea Contents Association
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• v.12 no.1
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• pp.176-184
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• 2012

People are exposed to various media. After the Digital Revolution, quantitative expansion of the media is at a rapid pace. Because of the expansion of the media, advertising needs efforts that induce the audiences' reaction. Rhetorical devices are used as the efforts. This study noted the visual paradox of rhetorical devices because it is an effective representation device that induced audiences' reaction by deliberate contradiction and ambiguity. This study has defined the visual paradox based on define and classification of paradox in logic. This study also tried to reveal the relationship between images and text for signification by metalanguage because it is important to the visual paradox in advertising. And analyzed cases of Volkswagen ads to prove the research process. Finally identified that images and text interact to create a new meaning.

• Proceedings of the KIEE Conference
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• 2002.11d
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• pp.197-199
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• 2002

The invention of VHDL(Very High Speed Integrated Circuit Hardware Description Language), Technical language of Hardware, is a kind of turning point in digital circuit designing, which is being more and more complicated and integrated. Because of its excellency in expression ability of hardware, VHDL is not only used in designing Hardware but also in simulation for verification, and in exchange and conservation, composition of the data of designs, and in many other ways. Especially, It is very important that VHDL is a Technical language of Hardware standardized by IEEE, intenational body with an authority. The biggest problem in modern circuit designing can be pointed out in two way. One is a problem how to process the rapidly being complicated circuit complexity. The other is minimizing the period of designing and manufacturing to survive in a cutthroat competition. To promote the use of VHDL, more than a simple use of simulation by VHDL, it is requested to use VHDL in composing logical circuit with chip manufacturing. And, by developing the quality of designing technique, it can contribute for development in domestic industry related to ASIC designing. In this paper in designing SMPS(Switching mode power supply), programming PWM by VHDL, it can print static voltage by the variable load, connect computer to chip with byteblaster, and download in Max(EPM7064SLCS4 - 5)chip of ALTER. To achieve this, it is supposed to use VHDL in modeling, simulating, compositing logic and product of the FPGA chip. Despite its limit in size and operating speed caused by the specific property of FPGA chip, it can be said that this method should be introduced more aggressively because of its prompt realization after designing.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.43 no.2
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• pp.166-171
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• 2015

This paper shows the design of operational flight program(OFP) using model-based design(MBD) method which is used in various engineering fields to reduce time and flight risks for development. The verification of OFP for DO-178C guidelines carry out by a model advisor function of simulink. The flight control logic on simulink is converted into C-language by auto code generation tool from, then it is implemented on 32bit digital signal processor(DSP). The verifications of flight control algorithm on various weather conditions are performed by the HILS system with Flight simulator program, X-plane.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.14 no.4
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• pp.268-275
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• 2014

In future, hospitals are expected to automatically issue remote transcriptions. Many general hospitals are planning to encrypt their medical database to secure personal information as mandated by law. The electronic medical record system, picture archiving communication system, and the clinical data warehouse, amongst others, are the preferred targets for which stronger security is planned. In the near future, medical systems can be assumed to be automated and connected to remote locations, such as rural areas, and islands. Connecting patients who are in remote locations to medical complexes that are usually based in larger cities requires not only automatic processing, but also a certain amount of security in terms of medical data that is of a sensitive and critical nature. Unauthorized access to patients' transcription data could result in the data being modified, with possible lethal results. Hence, personal and sensitive data on telemedicine and medical information systems should be encrypted to protect patients from these risks. Login passwords, personal identification information, and biological information should similarly be protected in a systematic way. This paper proposes the use of electronic acupuncture with a built-in multi-pad, which has the advantage of being able to establish a patient's physical condition, while simultaneously treating the patient with acupuncture. This system implements a sensing pad, amplifier, a small signal drive circuit, and a digital signal processing system, while the use of a built-in fuzzy technique and a control algorithm have been proposed for performing analyses.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.9
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• pp.1-10
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• 1998

This paper is to propose an algorithm named as DYSAC to find the critical path(the longest sensitizable path) in a large digital circuit, whose purpose is to reduce the time to find critical path and to find critical paths of the circuits for which the previous methods could not find one. Also a set of path sensitization criteria named as DYPSEC is proposed, which is used to select a path from input to the output inside the DYSAC. The DYSAC consists of two sub-algorithms; the level assignment algorithm to assign a level to each node and the critical path selection algorithm to select the sensitizable path. The proposed algorithm was implemented with C-language on SUN Sparc and applied to the ISCAS'85 benchmark circuits to make sure if it works correctly and finds the correct critical path. Also, the results from the experiments were compared to the results from the previous works. The comparison items were the ability to find the critical path and the speed, in both of which the proposed algorithm in this paper shows better results than others.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.44 no.4 s.316
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• pp.1-9
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• 2007

An embedded system is implemented in this work by removing PCMCIA dedicate controller chip from ARM processor based embedded Linux system. In this paper, we propose PCMCIA interface architecture by using Ad hoc methods for wireless network. The proposed system is developed based on S3C2410A processor and it is interfaced with PCMCIA socket by using combinational digital logic circuits. It is interesting to observe that Ad hoc interface provides $97.9%{\sim}102.49%$ performance when compared with dedicate controller systems. The results indicate that the proposed method simplifies the system without loss of performance.