• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.5A
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• pp.341-346
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• 2009

M-WiMAX (Mobile-Worldwide Interoperability for Microwave Access) system, which uses OFDM (Orthogonal Frequency Division Multiplexing) technique, is known to be proper for mobile high-speed data transmission system. Nevertheless, M-WiMAX is seriously sensitive to IQ imbalance caused by the LO (Local Oscillator) at the receiver. In this paper, we analyze the effect of IQ imbalance on the system, and then propose a joint optimization scheme that can optimize DFE (Digital Front-end) of mobile modem by combining operation duplicated between AGC (Automatic Gain Control) and the estimation and compensation of IQ imbalance. Simulation results show that the proposed scheme achieves the same performance of the conventional scheme while reducing the complexity of the H/W implementation.

• Proceedings of the IEEK Conference
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• summer
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• pp.77-81
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• 2004

In this paper, we propose a analog front-end (AFE) for noncoherent On-Off Keying (OOK) Ultra Wide Band (UWB) system based on power detection. The proposed AFE are designed using 0.18 micron CMOS technology and verified by simulation using SPICE. The proposed AFE consist of Sample-and-Hold block, Analog-to-Digital converter, synchronizer, delayed clock generator and impulse generator. The time resolution of 1ns is obtained with 100MHz system clocks and the synchronized 10-bit digital outputs are delivered to the baseband. The impulse generator produces 1ns width pulse using digital CMOS gates. The simulation results show the feasibility of the proposed UWB AFE systems.

• Transactions on Electrical and Electronic Materials
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• v.11 no.1
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• pp.20-23
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• 2010

The analog front end (AFE) of a radio frequency identification transponder using the ISO 14443 type A standard with a 100% amplitude shift keying (ASK) modulation is proposed in this paper and verified by circuit simulations and measurements. This AFE circuit, using a 13.56 MHz carrier frequency, consists of a rectifier, a modulator, a demodulator, a regulator, a power on reset, and a dynamically enabled digital phase locked loop (DPLL). The DPLL, with a charge pump enable circuit, was used to recover the clock of a 100% modulated ASK signal during the pause period. A high voltage lateral double diffused metal-oxide semiconductor transistor was used to protect the rectifier and the clock recovery circuit from high voltages. The proposed AFE was fabricated using the $0.18\;{\mu}m$ standard CMOS process, with an AFE core size of $350\;{\mu}m\;{\times}\;230\;{\mu}m$. The measurement results show that the DPLL, using a demodulator output signal, generates a constant 1.695 MHz clock during the pause period of the 100% ASK signal.

• Digital Contents
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• no.9 s.52
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• pp.72-77
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• 1997

SAS는 데이터 웨어하우스 추출에서 저장, OLAP, DSS, 마이닝에 이르기까지의 전 과정에 대한 솔루션을 제공한다. 지난 20년간 의사결정지원 분야에서 탁월한 기능으로 세계적으로 명성을 얻고 있는 SAS는 데이터 웨어하우징 분야에서도 Back-End와 Front-End에 있어서의 뛰어난 기능을 바탕으로 의사결정 지원을 위한 최적의 데이터 웨어하우징 솔루션을 제공하고 있다.

• Journal of Positioning, Navigation, and Timing
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• v.6 no.1
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• pp.1-8
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• 2017

In this study, to design a multi-GNSS receiver using single RF front-end, the receiving performances for various frequency plans were evaluated. For the fair evaluation and comparison of different frequency plans, the same signal needs to be received at the same time. For this purpose, two synchronized RF front-ends were configured using USRP X310, and PC-based software was implemented so that the quality of the digital IF signal received at each front-end could be evaluated. The software consisted of USRP control, signal reception, signal acquisition, signal tracking, and C/N0 estimation function. Using the implemented software and USRP-based hardware, the signal receiving performances for various frequency plans, such as the signal attenuation status, overlapping of different systems, and the use of imaginary or real signal, were evaluated based on the C/N0 value. The results of the receiving performance measurement for the various frequency plans suggested in this study would be useful reference data for the design of a multi-GNSS receiver in the future.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.1C
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• pp.77-86
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• 2010

In this paper, we present a noncoherent IR-UWB (Impulse Radio-Ultra Wide Band) ranging system with an AFE (Analog Front End) composed of a simple integrator and an 1-bit ADC (Analog-to-Digital Converter), and define AFE characteristics affecting the ranging performance. This system is realistic and easy to implement, since the integrator simply accumulates signal energies and the simple 1-bit ADC is applied instead of the multi-bit ADCs for coherent IR-UWB systems. On the other hand, its ranging accuracy is largely affected channel environments such as noise, multipath fading and so on, since the noncoherent receiver simply squares and integrates the received signals. However, despite these practical importances, there are few conventional researches on the performance analysis according to AFE characteristics in IR-UWB ranging systems. To this end, we analyze in this paper ranging performance according to AFE characteristics for the noncoherent IR-UWB ranging system in various wireless channel environments, and through these results we also present system parameters to be considered in UWB hardware designs.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.12
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• pp.2286-2292
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• 2011

In this paper we present the design of Low Noise Amplifier(LNA), mixer and filter for RF front-end part of partial discharge monitoring system. The monitoring system of partial discharge in high voltage power machinery is used to prevent many kinds of industrial accidents, and is usually composed of three parts - sensor, RF front-end and digital microcontroller unit. In our study, LNA, mixer and filter are key components of the RF front-end. The LNA consists of common gate and common source-cascaded structure and uses the resistive feedback for broad band matching. A coupled line structure is utilized to implement the filter, of which size is reduced by the meander structure. The mixer is designed using dual gate structure for high isolation between RF and local oscillator signal.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.2
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• pp.85-90
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• 2009

This paper presents a single supply PLC SoC ASIC with a built-in analog Front-end circuit. To achieve the low power consumption along with low cost, this PLC SoC employs fully CMOS Analog Front End (AFE) and several LDO regulators (LDOs) to provide the internal power for Logic Core, DAC and Input/output Pad driver. The receiver part of the AFE consists of Pre-amplifier, Gain Amplifier and 1 bit Comparator. The transmitter part of the AFE consists of 10 bit Digital Analog Converter and Line Driver. This SoC is implemented with 0.18 ${\mu}m$ 1 Poly 5 Metal CMOS Process. The single supply voltage is 3.3 V and the internal powers are provided using LDOs. The total power consumption is below 30 mA at stand-by mode to meet the Eco-Design requirement. The die size is 3.2 $\times$ 2.8 $mm^{2}$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.8
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• pp.1805-1812
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• 2011

Bandpass sampling technique has an advantage that it uses lower sampling frequency than Nyquist criterion. But special care is required in choosing sampling frequency to avoid self-image overlapping in the first Nyquist region. Recently, the second-order BPS techniques which can suppress possible self-image by using an additional ADC and by employing digital signal processing have been proposed. This paper addresses a complex BPS based SDR front-end. Unlike general second-order BPS, it needs simple FIR filter to compensate delay in the second ADC. We show a method to find proper sampling frequencies to down convert RF signals selected by tunable RF filter operating in arbitrary frequency range.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.1
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• pp.15-20
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• 2012

In this paper, we designed and analysed K-band front-end module for digital microwave communication system receiver which improvement of dynamic range. We also suggested method of minimum amplified input signal level used to minimize noise figure of low-noise amplifier for High dynamic range. The designed modules consist of active mixer with conversions gain and PL-DRO with high stability and quality factor. The designed modules performance is that has the characteristics of over 54dB conversion gain, 1.3dB noise figure.