Transactions on Electrical and Electronic Materials

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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A 13.56 MHz Radio Frequency Identification Transponder Analog Front End Using a Dynamically Enabled Digital Phase Locked Loop

  • Choi, Moon-Ho (Department of Semiconductor Engineering, Chungbuk National University) ;
  • Yang, Byung-Do (Department of Semiconductor Engineering, Chungbuk National University) ;
  • Kim, Nam-Soo (Department of Semiconductor Engineering, Chungbuk National University) ;
  • Kim, Yeong-Seuk (Department of Semiconductor Engineering, Chungbuk National University) ;
  • Lee, Soo-Joo (System LSI Division, Samsung Electronics Co.) ;
  • Na, Kee-Yeol (Chungbuk Provincial College)
  • Published : 2010.02.28
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Abstract

The analog front end (AFE) of a radio frequency identification transponder using the ISO 14443 type A standard with a 100% amplitude shift keying (ASK) modulation is proposed in this paper and verified by circuit simulations and measurements. This AFE circuit, using a 13.56 MHz carrier frequency, consists of a rectifier, a modulator, a demodulator, a regulator, a power on reset, and a dynamically enabled digital phase locked loop (DPLL). The DPLL, with a charge pump enable circuit, was used to recover the clock of a 100% modulated ASK signal during the pause period. A high voltage lateral double diffused metal-oxide semiconductor transistor was used to protect the rectifier and the clock recovery circuit from high voltages. The proposed AFE was fabricated using the $0.18\;{\mu}m$ standard CMOS process, with an AFE core size of $350\;{\mu}m\;{\times}\;230\;{\mu}m$. The measurement results show that the DPLL, using a demodulator output signal, generates a constant 1.695 MHz clock during the pause period of the 100% ASK signal.

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References

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