• Title/Summary/Keyword: Differential power processing

Search Result 91, Processing Time 0.027 seconds

On Differential Power Analysis On The Addition modular $2^N$ Operation (덧셈 연산에서 차분 전력 분석에 관한 연구)

  • Choi, Hee-Bong;Park, Il-Hwan;Yun, Lee-Joong;Won, Dong-Ho
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • 2001.10b
    • /
    • pp.903-906
    • /
    • 2001
  • 2000년 T.S.Messerges는 데이터와 키의 이원가산 연산에서 해밍 무게에 기초한 차분 전력 분석 기술을 제안하였다. 본 논문에서는 T.S.Messerges의 분석 기술이 데이터와 키의 덧셈 mod $2^N$ 연산에 대해서도 확대 적용한 수 있음을 제안하고 이에 대한 시뮬레이션 절과를 제시한다. 데이터와 키의 이원 가산 연산은 Twofish와 같은 암호 알고리즘에서 사용되고 있으며 덧셈 mod $2^N$ 연산은 IDEA와 같은 암호 알고리즘에서 사용되고 있다. 따라서 본 논문에서 제안한 전력 분석 적용기술을 이용할 경우 IDEA의 키 128비트 중 덧셈 mod $2^N$ 연산에 들어가는 키 32비트를 분석해 낼 수 있다.

  • PDF

Differential Power Processing Converter system using High Step-up converter for Photovoltaic (고승압 컨버터를 사용한 태양광 차동 전력 조절기 구조)

  • Kim, Jae-Bong;Jeon, Young-Tae;Park, Joung-hu;Jeon, Hee-Jong
    • Proceedings of the KIPE Conference
    • /
    • 2016.07a
    • /
    • pp.293-294
    • /
    • 2016
  • 태양광 발전 시스템은 그 필요성이 늘어남에 따라 다양한 연구가 진행되고 있다. 기존에 태양광 발전 제어 방식인 스트링 방식이나, 마이크로 컨버터 같은 방식 이외에도 그늘짐 등으로 인해 발생한 태양광 모듈의 전력 차이만을 부담하는 컨버터를 이용한 차동 전력 조절 방식도 연구가 되고 있다. 차동 전력조절기는 담당하는 전력이 적고, 스트링 컨버터를 통해 많은 전력이 전달이 되어 기존의 방식 보다 효율이 높다. 하지만, 태양광 모듈 MPPT 전압으로 부터 DC_link 전압만큼의 승압이 필요하다. 따라서, 고승압, 고효율 컨버터를 차동 전력 조절기로 사용을 하면 기존의 차동 전력 방식보다 더 나은 동작 특성을 가질 수 있다. 따라서 본 논문에서는 차동 전력 조절기로 고승압의 컨버터 토폴로지를 사용하여, 기존의 방식보다 고효율을 유지하면서 차동 전력 조절기의 기능을 수행하는 구조를 제안한다.

  • PDF

Relative Measurement of Differential Electrode Impedance for Contact Monitoring in a Biopotential Amplifier

  • Yoo, Sun-K.
    • International Journal of Control, Automation, and Systems
    • /
    • v.5 no.5
    • /
    • pp.601-605
    • /
    • 2007
  • In this paper, we propose a simple and relative electrode contact monitoring method. By exploiting the power line interference, which is regarded as one of the worst noise sources for bio-potential measurement, the relative difference in electrode impedance can be measured without a current or voltage source. Substantial benefits, including no extra circuit components, no degradation of the body potential driving circuit, and no electrical safety problem, can be achieved using this method. Furthermore, this method can be applied to multi-channel isolated bio-potential measurement systems and home health care devices under a steady measuring environment.

Design Consideration of Bidirectional Flyback Converter for PV Differential Power Processing Modules (PV 시스템의 차동 전력 조절기 모듈용 양방향 플라이백 컨버터 설계 방법)

  • Park, Seungbin;Kim, Mina;Jung, Jee-Hoon
    • Proceedings of the KIPE Conference
    • /
    • 2018.07a
    • /
    • pp.135-137
    • /
    • 2018
  • 양방향 플라이백 컨버터는 1, 2차 간 절연이 가능하고, 양방향 전력전달을 할 수 있으며, 전력밀도가 높기 때문에 PV 용 차동 전력 조절기 (DPP) 모듈의 응용분야에 적합하다. 차동 전력 조절기 모듈 용 플라이백 컨버터는 양방향 동작을 위해 1, 2차 측 모두 능동 소자 및 스너버 회로로 구성 되어있다. 그러나 양방향 동작을 위해 추가된 회로는 플라이백 컨버터의 효율을 감소시키기 때문에 고효율의 양방향 플라이백 컨버터를 설계하기 위해서는 기존의 플라이백 컨버터와는 다른 설계 고려 사항들이 존재한다. 본 논문에서는 양방향 플라이백 컨버터의 각 소자별 손실을 고려하여 정격 부하 시 정방향 동작과 역방향 동작의 최대 효율을 얻을 수 있는 변압기의 자화 인덕턴스의 값을 제시한다. 본 설계 방법은 25 W 급 양방향 플라이백 컨버터 시작품을 이용하여 정격부하에서 전력변환 효율과 설계의 타당성을 실험적으로 검증하였다.

  • PDF

Development of Image Processing Software for Ultrasonic NDE (초음파 비파괴 검사를 위한 영상처리 소프트웨어 개발)

  • Park, Jin-Hong;Nam, Myung-Woo;Lee, Young-Seock
    • Proceedings of the IEEK Conference
    • /
    • 2007.07a
    • /
    • pp.459-460
    • /
    • 2007
  • In this paper, we describe a development of ultrasonic nondestructive evaluation software to analyze steam generator of nuclear power plant. The developed software includes classical analysis method such as A, B, C and D-scan images. And it can analyze the size and the location of internal cracks using 2D image. To do such, we obtain raw data from specimens of real pipeline of power plants, and get the crack points using LPF and differential method from obtained ultrasonic 1-dimensional data. The results of applications showed that the developed software provided accurate images of cracks on various specimens.

  • PDF

Ultra Precise Position Estimation of Servomotor using Analog Quadrature Encoder

  • Kim Ju-Chan;Hwang Seon-Hwan;Kim Jang-Mok;Kim Cheul-U;Choi Cheol
    • Journal of Power Electronics
    • /
    • v.6 no.2
    • /
    • pp.139-145
    • /
    • 2006
  • This paper describes the ultra precise position estimation of a servomotor using a sinusoidal encoder based on Arcsine Interpolation Method for the cost reduction of circuit design. The amplitude and offset errors of the sinusoidal encoder output signals, from the encoder itself and analog signal processing procedures, are effectively compensated and on-line tuned by utilizing a low cost programmable differential amplifier without any special expensive equipment. For a theoretical evaluation of the practical resolution of this system, the relationship between the amplitude of ADC(Analog to Digital Converter) input signal errors and the anticipated resolution is also addressed. The performance of the proposed method is verified by comparing it with speed control characteristics of the servomotor driving system using a digital incremental 50,000ppr encoder in the experiments.

Space-Time Concatenated Convolutional and Differential Codes with Interference Suppression for DS-CDMA Systems (간섭 억제된 DS-CDMA 시스템에서의 시공간 직렬 연쇄 컨볼루션 차등 부호 기법)

  • Yang, Ha-Yeong;Sin, Min-Ho;Song, Hong-Yeop;Hong, Dae-Sik;Gang, Chang-Eon
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.39 no.1
    • /
    • pp.1-10
    • /
    • 2002
  • A space-time concatenated convolutional and differential coding scheme is employed in a multiuser direct-sequence code-division multiple-access(DS-CDMA) system. The system consists of single-user detectors (SUD), which are used to suppress multiple-access interference(MAI) with no requirement of other users' spreading codes, timing, or phase information. The space-time differential code, treated as a convolutional code of code rate 1 and memory 1, does not sacrifice the coding efficiency and has the least number of states. In addition, it brings a diversity gain through the space-time processing with a simple decoding process. The iterative process exchanges information between the differential decoder and the convolutional decoder. Numerical results show that this space-time concatenated coding scheme provides better performance and more flexibility than conventional convolutional codes in DS-CDMA systems, even in the sense of similar complexity Further study shows that the performance of this coding scheme applying to DS-CDMA systems with SUDs improves by increasing the processing gain or the number of taps of the interference suppression filter, and degrades for higher near-far interfering power or additional near-far interfering users.

Plasma-Surface-Treatment of Nylon 6 Fiber for the Improvement of Water-Repellency by Low Pressure RF Plasma Discharge Processing (나일론 6 섬유의 발수성 향상을 위한 RF 플라스마 표면처리)

  • Ji, Young-Yeon;Jeong, Tak;Kim, Sang-Sik
    • Polymer(Korea)
    • /
    • v.31 no.1
    • /
    • pp.31-36
    • /
    • 2007
  • It has been reported that the surface properties of the plasma treated material were changed while maintaining its bulk properties. In this study, surface modification of nylon fiber by plasma treatment was tried to attain high water-repellency Nylon fiber was treated with RF plasma under a vacuum system using various parameters such as gas specious, processing time and processing power. Morphological changes by low pressure plasma treatment were observed using scanning electron microscopy (SEM) and atomic force microscopy (AFM). Moreover, the mechanical and inherent properties were analyzed by tensile strength, differential scanning calorimetry (DSC) and thermogravimetric analysis (TGA). The high water-repellency property of nylon fiber was evaluated by a water-drop standard test under various conditions in terms of aging effect. The results showed that the water-repellency of plasma-surface-treated nylon fiber was greatly improved compared to untreated nylon fiber.

A Low-Voltage Low-Power Opamp-Less 8-bit 1-MS/s Pipelined ADC in 90-nm CMOS Technology

  • Abbasizadeh, Hamed;Rikan, Behnam Samadpoor;Lee, Dong-Soo;Hayder, Abbas Syed;Lee, Kang-Yoon
    • IEIE Transactions on Smart Processing and Computing
    • /
    • v.3 no.6
    • /
    • pp.416-424
    • /
    • 2014
  • This paper presents an 8-bit pipelined analog-to-digital converter. The supply voltage applied for comparators and other sub-blocks of the ADC were 0.7V and 0.5V, respectively. This low power ADC utilizes the capacitive charge pump technique combined with a source-follower and calibration to resolve the need for the opamp. The differential charge pump technique does not require any common mode feedback circuit. The entire structure of the ADC is based on fully dynamic circuits that enable the design of a very low power ADC. The ADC was designed to operate at 1MS/s in 90nm CMOS process, where simulated results using ADS2011 show the peak SNDR and SFDR of the ADC to be 47.8 dB (7.64 ENOB) and 59 dB respectively. The ADC consumes less than 1mW for all active dynamic and digital circuitries.

Multi-Valued Logic Device Technology; Overview, Status, and Its Future for Peta-Scale Information Density

  • Kim, Kyung Rok;Jeong, Jae Won;Choi, Young-Eun;Kim, Woo-Seok;Chang, Jiwon
    • Journal of Semiconductor Engineering
    • /
    • v.1 no.1
    • /
    • pp.57-63
    • /
    • 2020
  • Complementary metal-oxide-semiconductor (CMOS) technology is now facing a power scaling limit to increase integration density. Since 1970s, multi-valued logic (MVL) has been considered as promising alternative to resolve power scaling challenge for increasing information density up to peta-scale level by reducing the system complexity. Over the past several decades, however, a power-scalable and mass-producible MVL technology has been absent so that MVL circuit and system implementation have been delayed. Recently, compact MVL device researches incorporating multiple-switching characteristics in a single device such as 2D heterojunction-based negative-differential resistance (NDR)/transconductance (NDT) devices and quantum-dot/superlattices-based constant intermediate current have been actively performed. Meanwhile, wafer-scale, energy-efficient and variation-tolerant ternary-CMOS (T-CMOS) technology has been demonstrated through commercial foundry. In this review paper, an overview for MVL development history including recent studies will be presented. Then, the status and its future research direction of MVL technology will be discussed focusing on the T-CMOS technology for peta-scale information processing in semiconductor chip.