• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.3
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• pp.278-285
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• 2012

A digital readout IC for capacitive sensors is presented. Digital capacitance readout circuits suffer from static capacitance of sensors, especially single-ended sensors, and require large passive elements to cancel such DC offset signal. For this reason, to maximize a dynamic range with a small die area, the proposed circuit features digital filters having a coarse and fine compensation steps. Moreover, by employing switched-capacitor circuit for the front-end, correlated double sampling (CDS) technique can be adopted to minimize low-frequency device noise. The proposed circuit targeted 8-kHz signal bandwidth and oversampling ratio (OSR) of 64, thus a $3^{rd}$-order ${\Delta}{\Sigma}$ modulator operating at 1 MH was used for pulse-density-modulated (PDM) output. The proposed IC was designed in a 0.18-${\mu}m$ CMOS mixed-mode process, and occupied $0.86{\times}1.33mm^2$. The measurement results shows suppressed DC power under about -30 dBFS with minimized device flicker noise.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2006.05a
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• pp.381-385
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• 2006

This research introduces easy tool manufacturing method regarding tool manufacturing procedure. In the conventional method, wire cutting machining and lapping operation of corner and render region were performed after shrink-fitting to ensure the accuracy of gear profile. But lapping operation is very difficult due to corner and render is located deep inside of die. In this research, wire cutting operation was performed after $1^{st}$ ring was shrink-fitted to ease lapping operation and increase the accuracy of corner radius. Before $2^{nd}$ ring fitting, lapping was completed. Elastic deformation amount due to $2^{nd}$ ring fitting and cold forging was calculated through finite element analysis and wire cutting specification was offset in that amount. Comparison of gear dimension between analysis and forged part ensures the validity of new manufacturing methods.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.3
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• pp.160-165
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• 2009

A 12b 2 MS/s cyclic ADC processing 3.3 Vpp single-ended rail-to-rail input signals is presented. The proposed ADC demonstrates an offset voltage less than 1 mV without well-known calibration and trimming techniques although power supplies are directly employed as voltage references. The SHA-free input sampling scheme and the two-stage switched op-amp discussed in this work reduce power dissipation, while the comparators based on capacitor-divided voltage references show a matched full-scale performance between two flash sub ADCs. The prototype ADC in a $0.18{\mu}m$ 1P6M CMOS demonstrates the effective number of bits of 11.48 for a 100 kHz full-scale input at 2 MS/s. The ADC with an active die area of $0.12\;mm^2$ consumes 3.6 m W at 2 MS/s and 3.3 V (analog)/1.8 V (digital).

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12B
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• pp.1695-1702
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• 2001

This paper describes a design of CMOS infrared (IR) wireless data link IC which can be used in IrDA(Infrared Data Association) application from 4 Mb/s to 100 Mb/s The implemented chip consists of variable gain transimpedance amplifier which has a gain range from 60 dB to 100 dB, AGC (automatic gain control) circuits, AOC(automatic offset control) loop, 4 PPM (pulse position modulation) modulator/demodulator and DLL(delay locked loops). This infrared optical link If was implemented using commercial 0.25 um 1-poly 5-metal CMOS process. The chip consumes 25 mW at 100 Mb/s with 2.5 V supply voltage excluding buffer amplifier. The die area of prototype IC is 1.5 mm $\times$ 1 mm.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.3
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• pp.179-192
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• 2008

A multiphase compensation method with mismatch linearization technique, is presented and demonstrated in a $\Sigma-\Delta$ fractional-N frequency synthesizer. An on-chip delay-locked loop (DLL) and a proposed delay line structure are constructed to provide multiphase compensation on $\Sigma-\Delta$ quantizetion noise. In the delay line structure, dynamic element matching (DEM) techniques are employed for mismatch linearization. The proposed $\Sigma-\Delta$ fractional-N frequency synthesizer is fabricated in a $0.18-{\mu}m$ CMOS technology with 2.14-GHz output frequency and 4-Hz resolution. The die size is 0.92 mm$\times$1.15 mm, and it consumes 27.2 mW. In-band phase noise of -82 dBc/Hz at 10 kHz offset and out-of-band phase noise of -103 dBc/Hz at 1 MHz offset are measured with a loop bandwidth of 200 kHz. The settling time is shorter than $25{\mu}s$.

• Transactions of Materials Processing
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• v.20 no.3
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• pp.214-221
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• 2011

In recent years, automotive seat components have been manufactured by the fine blanking process, allowing an improvement of dimensional accuracy at sheared surface in series production. However, the rollover has increased and die failures have occurred more frequently when manufacturing gears by fine blanking. Consequently, important goals for manufacturing seat recliner parts with gears have been to decrease the rollover as well as to improve the tool life. In this study, the half blanking and shaving processes were introduced to improve aforementioned problems for the lower tooth, the main component of a seat recliner. For this purpose, the half blanking process was optimized using the finite element (FE) analysis and design of experiment (DOE). The optimized conditions resulting from this study were an offset of 0.2 mm, a clearance of 0.1 mm and a penetration depth of 4.5 mm. Fine blanking experiment conducted under the optimal condition resulted in a rollover depth decrease from 1.9 to 1.3 mm, and no die failure occurrence.

• Journal of Technologic Dentistry
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• v.41 no.2
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• pp.81-86
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• 2019

Purpose: The purpose of the present study was to compare the internal fit of two different temporary restorations fabricated by dental CAD/CAM system and to evaluate clinical effectiveness. Methods: Composite resin tooth of the maxillary first molar was prepared as occlusal reduction(2.0mm), axial reduction(1mm offset), vertical angle(6 degree) and chamfer margin for a temporary crown and duplicated epoxy die was fabricated. The epoxy dies were used to fabricate provisional restorations by CAD/CAM milling technique or 3D-printing technique. The inner data from all crowns were superimposed on the master die file in the 'best-fit alignment' method using 3D analysis software. Statistical analysis was performed using a Wilcoxon's rank sum test for differences between groups. Results: It showed that the internal RMS(Root Mean Square) values of the additive group were significantly larger than those of other group. No significant differences in internal discrepancies were observed in the temporary crowns among the 2 groups with different manufacturing method. Conclusion: All the groups had the internal fit within the clinical acceptable range (< $50{\mu}m$). The continuous research in the future to be applied clinically for the adaptation of additive manufacturing technique are needed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.10
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• pp.1151-1156
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• 2012

In this paper, the baseband filter is proposed in order to maintain a constant sensitivity regardless of distances for 77 GHz automotive radar system. Using existing DCOC loop circuit can remove DC offset and also cancel differences of received power depending on the distance. Measured results show that the maximum gain is 51 dB and high pass cutoff frequency can be tuned from 5 kHz to 15 kHz. The slope of high pass filter can be tuned from -10 to -40 dB/decade for the distance compensation. The measured NF and IIP3 are 26 dB and +4.5 dBm with 4.3 mA at 1.0 V supply voltage, respectively. The fabricated die size $500{\mu}m{\times}1,050{\mu}m$ excluding the in/out pads.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.20 no.11
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• pp.3474-3490
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• 1996

A metal matrix composites(MMCs) for A16061 reinforced with silicon carbide particles is fabricated by melt-stirring method. The primary products of MMCs billets are prepared by volume fractions 5 vol% to 20 vol% and particle size $13\mu m$ to $22\mu m$.This paper will be made to examine the microstructure and mechanical properties of fabricated $SiC_p$/Al 6061 composite by melt-stirring and squeeze casting method. The MMC billets is extruded at $500^{\circ}C$ under the constant extrusion velocity $V_e$=2mm/min using curved shape die. Extrusion force, particle rearrangement, micro structure and mechanical properties of extruded composites will be investigated. The mechanical properties of primary billets manufactured by melt-stirring and squeeze casting method will be compared with extrusion specimen. The effect of volume fraction and size of the reinforcements will be studied. The increase in uniformity of particle dispersion is the major reason for an improvement in reliability due to hot extrusion with optimal shape die. Experimental Young's modulus and 0.2% offset yield strength for the extruded MMCs will be compared with theretical values calculated by the Eshelby method. A method will be proposed for the prediction of Young's modulus and yield strength in $SiC_p$ reinforced MMCs.

• IE interfaces
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• v.9 no.2
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• pp.119-128
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• 1996

A procedure is presented for a 3D-contour machining without cutter interferences. The 3D-contouring machining along a spatial curve is often required for manufacturing trimming and flange dies in motor industries. Input data for the machining contour is a spline curve with polynomial vector equation provided by CATIA system. Points are sampled on the contour curve and line segments and helical curves are approximated from the point data. Cutter interference is checked on the approximated spline and all of interference curves are substituted with interference-free helical curves for a tool path generation. The non-machined curve areas are locally machined by tools with smaller diameters. A tool radius offset is considered for generating NC data to be free with tool size.