• Journal of Sensor Science and Technology
• /
• v.31 no.6
• /
• pp.361-365
• /
• 2022

Advanced packaging demands are driven by the need for dense integration systems. Consequently, stacked packaging technology has been proposed instead of reducing the ultra-fine patterns to secure economic feasibility. This study proposed an effective packaging process technology for semiconductor devices using a 9-inch dicing die attach film (DDAF), wherein the die attach and dicing films were combined. The process involved three steps: tape lamination, dicing, and bonding. Following the grinding of a silicon wafer, the tape lamination process was conducted, and the DDAF was arranged. Subsequently, a silicon wafer attached to the DDAF was separated into dies employing a blade dicing process with a two-step cut. Thereafter, one separated die was bonded with the other die as a substrate at 130 ℃ for 2 s under a pressure of 2 kgf and the chip was hardened at 120 ℃ for 30 min under a pressure of 10 kPa to remove air bubbles within the DAF. Finally, a curing process was conducted at 175 ℃ for 2 h at atmospheric pressure. Upon completing the manufacturing processes, external inspections, cross-sectional analyses, and thermal stability evaluations were conducted to confirm the optimality of the proposed technology for application of the DDAF. In particular, the shear strength test was evaluated to obtain an average of 9,905 Pa from 17 samples. Consequently, a 3D integration packaging process using DDAF is expected to be utilized as an advanced packaging technology with high reliability.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.21 no.12
• /
• pp.261-267
• /
• 2020

The demand for faster, lighter, and thinner portable electronic devices has brought about a change in semiconductor packaging technology. In response, a stacked chip-scale package(SCSP) is used widely in the assembly industry. One of the key materials for SCSP is a die-attach film (DAF). Excellent flowability is needed for DAF for successful die attachment without voids. For DAF with high flowability, two-step curing is often required to reduce a cure crack, but one-step curing is needed to reduce the processing time. In this study, DAF composition was categorized into three groups: cure (epoxy resins), soft (rubbers), hard (phenoxy resin, silica) component. The effect of the composition on a cure crack was examined when one-step curing was applied. The die-attach void and flowability were also assessed. The cure crack decreased as the amount of hard components decreased. Die-attach voids also decreased as the amount of hard components decreased. Moreover, the decrease in cure component became important when the amount of hard component was small. The flowability was evaluated using high-temperature storage modulus and bleed-out. A decrease in the amount of hard components was critical for the low storage modulus at 100℃. An increase in cure component and a decrease in hard component were important for the high bleed-out at 120℃(BL-120).

• Journal of the Microelectronics and Packaging Society
• /
• v.21 no.2
• /
• pp.65-70
• /
• 2014

Warpage of top packages to form thin package-on-packages was measured with progress of their process steps such as PCB substrate itself, chip bonding, and epoxy molding. The $100{\mu}m$-thick PCB substrate exhibited a warpage of $136{\sim}214{\mu}m$. The specimen formed by mounting a $40{\mu}m$-thick Si chip to such a PCB using a die attach film exhibited the warpage of $89{\sim}194{\mu}m$, which was similar to that of the PCB itself. On the other hand, the specimen fabricated by flip chip bonding of a $40{\mu}m$-thick chip to such a PCB possessed the warpage of $-199{\sim}691{\mu}m$, which was significantly different from the warpage of the PCB. After epoxy molding, the specimens processed by die attach bonding and flip chip bonding exhibited warpages of $-79{\sim}202{\mu}m$ and $-117{\sim}159{\mu}m$, respectively.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.20 no.4
• /
• pp.503-509
• /
• 2019

The demand for smaller, faster, and multi-functional mobile devices in increasing at a rapidly increasing rate. In response to these trends, Stacked Chip Scale Package (SCSP) is used widely in the assembly industry. A film type adhesive called die attach film (DAF) is used widely for bonding chips in SCSP. The DAF requires high flowability at high die attachment temperatures for bonding chips on organic substrates, where the DAF needs to feel the gap depth, or for bonding the same sized dies, where the DAF needs to penetrate bonding wires. In this study, the mixture design of experiment (DOE) was performed for three raw materials to obtain the optimized DAF recipe for low elastic modulus at high temperature. Three components are acrylic polymer (SG-P3) and two solid epoxy resins (YD011 and YDCN500-1P) with different softening points. According to the DOE results, the elastic modulus at high temperature was influenced greatly by SG-P3. The elastic modulus at $100^{\circ}C$ decreased from 1.0 MPa to 0.2 MPa as the amount of SG-P3 was decreased by 20%. In contrast, the elastic modulus at room temperature was dominated by YD011, an epoxy with a higher softening point. The optimized DAF recipe showed approximately 98.4% pickup performance when a UV dicing tape was used. A DAF crack that occurred in curing was effectively suppressed through optimization of the cure accelerator amount and two-step cure schedule. The imizadole type accelerator showed better performance than the amine type accelerator.

• Journal of the Microelectronics and Packaging Society
• /
• v.20 no.3
• /
• pp.63-69
• /
• 2013

The warpage of a bottom package of Package on Package(PoP) where a chip was mounted to a substrate by flip chip process was compared to that of a bottom package for which a chip was bonded to a substrate using die attach film(DAF). At the solder reflow temperature of $260^{\circ}C$, the packages processed with flip chip bonding and DAF bonding exhibited warpages of $57{\mu}m$ and $-102{\mu}m$, respectively. At the temperature range between room temperature and $260^{\circ}C$, the packages processed with flip chip bonding and DAF bonding exhibited warpage values ranging from $-27{\mu}m$ to $60{\mu}m$ and from $-50{\mu}m$ to $-15{\mu}m$, respectively.

• Journal of the Microelectronics and Packaging Society
• /
• v.22 no.2
• /
• pp.61-68
• /
• 2015

Warpage analysis has been performed for top and bottom packages of thin package-on-packages processed with different epoxy molding compounds (EMCs). Warpage deviation was measured for packages molded with the same EMCs and also the warpage deviations of top and bottom substrates themselves were characterized in order to identify the major factor causing the package warpage. For the top and bottom packages processed with thin substrates, the warpage deviation of the substrates was large, which made it difficult to figure out the effect of EMC properties on the package warpage. Top packages, where the molding area of $13mm{\times}13mm$ covered the most of the substrate area ($14mm{\times}14mm$), exhibited similar warpage behavior with changing the temperature. On the other hand, bottom packages, where the molding area was only $8mm{\times}8mm$, exhibited the complex warpage behavior due to simultaneous occurrence of (+) and (-) warpages on the same package. Accordingly, the bottom packages showed dissimilar temperature-warpage behavior even being processed with the same EMCs.