• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.12
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• pp.25-35
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• 2001

In order to analyze the electrical characteristics of complicated thin film transistor-liquid crystal display (TFT-LCD) array circuits, it is indispensible to use simulation programs such as PSPICE and AIM-SPICE. In this paper, we present a systematic method of extracting the input parameters of poly-Si TFT for SPICE simulations. This method was applied to two different types of poly-Si TFTs, fabricated by excimer laser annealing and silicide mediated crystallization methods, and yielded good fitting results to experimental data. Among the SPICE simulators, PSPICE has the graphic user interface feature making the composition of complicated circuits easier. We added successfully a poly-Si TFT device model to the PSPICE simulator, and analyzed easily the electrical characteristics of pixels considering the line RC delay. The results of this work would contribute to efficient simulations of poly-Si TFT-LCD arrays.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.599-602
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• 2005

In this paper, we have performed a study that modifies the CPW Pad configurations to improve an $f_{max}$ characteristic of metamorphic HEMT. To analyze the CPW Pad structures of MHEMT, we use the ADS momentum simulator developed by $Agilent^{TM}$. Comparing the employed structure (G/W = 40/100 m), the optimized structure (G/W = 20/25 m) of CPW MHEMT shows the increased $S_{21}$ by 2.5 dB, which is one of the dominant parameters influencing the $f_{max}$ of MHEMT. To compare the performances of optimized MHEMT with the employed MHEMT, DC and RF characteristics of the fabricated MHEMT were measured. In the case of optimized CPW MHEMT, the measured saturated drain current density and transconductance $(g_m)$ were 693 mA/mm and 647 mS/mm, respectively. RF measurements were performed in a frequency range of $0.1{\sim}110$ GHz. A high $S_{21}$ gain of 5.5 dB is shown at a millimeter-wave frequency of 110 GHz. Two kinds of RF gains, $h_{21}$ and maximum available gain (MAG), versus the frequency, and a cut-off frequency ($f_t$) of ${\sim}154$ GHz and a maximum frequency of oscillation ($f_{max}$) of ${\sim}358$ GHz are obtained, respectively, from the extrapolation of the RF gains for a device biased at a peak transconductance. An optimized CPW MHEMT structure is one of the first reports among fabricated 0.1 m gate length MHEMTs.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.8
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• pp.30-37
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• 2014

In this paper, the compact model for FinFET gate resistance is developed. Based on the FinFET geometry and material, the value of the gate resistance is extracted by Y-parameter analysis using 3D device simulator, Sentaurus. By dividing the gate resistance into horizontal and vertical components, the proposed gate resistance model captures the non-linear characteristics. The proposed compact model reflects the realistic gate structure which has two different materials (Tungsten, TiN) stacked. Using the proposed model, the number of fins for the minimum gate resistance can be proposed based on the variation of gate geometrical parameters. The proposed gate resistance model is implemented in BSIM-CMG. A ring-oscillator is designed, and its delay performance is compared with and without gate resistance.

• Journal of IKEEE
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• v.22 no.1
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• pp.80-86
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• 2018

In this paper, we propose a new PNP bipolar insertion type ESD protection circuit with improved electrical characteristics than the existing ESD protection circuits SCR and LVTSCR. The proposed circuit has 8.59V trigger voltage which is about 9V lower than that of the conventional SCR, and the parasitic PNP has one more operation and high robustness characteristics. For the practical design of the proposed ESD protection circuit, the holding voltage was increased by increasing the base length of the parasitic PNP while increasing the variable L. To verify the electrical characteristics of the proposed device, Synopsys T-CAD simulator was used.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.306.1-306.1
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• 2016

ZnO semiconductor material has been widely utilized in various applications in semiconductor device technology owing to its unique electrical and optical features. It is a promising as solar cell material, because of its low cost, n-type conductivity and wide direct band gap. In this work ZnO/Si heterojunctions were fabricated by using pulsed laser deposition. Vacuum chamber was evacuated to a base pressure of approximately $2{\times}10^{-6}Torr$. ZnO thin films were grown on p-Si (100) substrate at oxygen partial pressure from 5mTorr to 40mTorr. Growth temperature of ZnO thin films was set to 773K. A pulsed (10 Hz) Nd:YAG laser operating at a wavelength of 266 nm was used to produce a plasma plume from an ablated a ZnO target, whose density of laser energy was $10J/cm^2$. Thickness of all the thin films of ZnO was about 300nm. The optical property was characterized by photoluminescence and crystallinity of ZnO was analyzed by X-ray diffraction. For fabrication ZnO/Si heterojunction diodes, indium metal and Al grid patterns were deposited on back and front side of the solar cells by using thermal evaporator, respectively. Finally, current-voltage characteristics of the ZnO/Si structure were studied by using Keithly 2600. Under Air Mass 1.5 Global solar simulator with an irradiation intensity of $100mW/cm^2$, the electrical properties of ZnO/Si heterojunction photovoltaic devices were analyzed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.3
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• pp.229-238
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• 2016

In this paper, we have studied isolation enhancement using a suppression of surface wave to improve performance of array antenna. To reduce isolation between elements of array antenna, perfect magnetic conductor(PMC) and SOFT-surface is designed and located at center of ground plane, isolation and gain is simulated by commercial full wave simulator(HFSS). As a result, isolation of more than 40 dB and gain improvement of 2.2 dBi are obtained at E-plane array in case of both PMC and SOFT-surface. At H-plane array, air coupling is dominant compared to coupling by surface wave. It is conclude that this study is useful for design of compact array antenna and performance improvement of array antenna.

• Journal of the Korea Computer Industry Society
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• v.10 no.4
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• pp.143-150
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• 2009

Remote control service, monitoring, gear service of information electronic appliance, various services of security service and so on of Home network that is by link of Ubiquitous environment are offered. These services need verification process through priority test to use and are changed. If test using actuality information electronic device for test, much expenses and time may be invested. Home network test bed offers softness of research using control model and simulator, in this paper, Wish to design and embody home network test bed to do environment construction of home network and test of application service. Because use istent power line just as it is without necessity to establish circuit in addition by solution of home network testbed, expense costs to be less and establishment used easy PLC. Also, propriated Wireless sensor network that use Zigbee by solution of home network testbed. Appliance check and monitor square do by Home Auto that know embodied, and embodied by Home Gateway that interlink terminals of Home Auto and out of.

• Korean Journal of Materials Research
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• v.28 no.4
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• pp.235-240
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• 2018

We propose a speedy two-step deposit process to form an Au electrode on hole transport layer(HTL) without any damage using a general thermal evaporator in a perovskite solar cell(PSC). An Au electrode with a thickness of 70 nm was prepared with one-step and two-step processes using a general thermal evaporator with a 30 cm source-substrate distance and $6.0{\times}10^{-6}$ torr vacuum. The one-step process deposits the Au film with the desirable thickness through a source power of 60 and 100 W at a time. The two-step process deposits a 7 nm-thick buffer layer with source power of 60, 70, and 80 W, and then deposits the remaining film thickness at higher source power of 80, 90, and 100 W. The photovoltaic properties and microstructure of these PSC devices with a glass/FTO/$TiO_2$/perovskite/HTL/Au electrode were measured by a solar simulator and field emission scanning electron microscope. The one-step process showed a low depo-temperature of $88.5^{\circ}C$ with a long deposition time of 90 minutes at 60 W. It showed a high depo-temperature of $135.4^{\circ}C$ with a short deposition time of 8 minutes at 100 W. All the samples showed an ECE lower than 2.8 % due to damage on the HTL. The two-step process offered an ECE higher than 6.25 % without HTL damage through a deposition temperature lower than $88^{\circ}C$ and a short deposition time within 20 minutes in general. Therefore, the proposed two-step process is favorable to produce an Au electrode layer for the PSC device with a general thermal evaporator.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.12
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• pp.2892-2898
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• 2015

We propose a new Double-Independent-Gate Ambipolar Silicon-Nanowire Field Effect Transistor(DIG Ambi-SiNWFET). The proposed transistor has two types of gate such as polarity gate and control gate. The polarity gate determines the operation that the gate bias controls NMOSFET or PMOSFET. The voltage of control gate controls the current characteristic of the transistor. We investigated systematically work functions of the two gates and source/drain to operate ambipolar current-voltage characteristics using 2D device simulator. When the work functions of polarity gate, control gate and source/drain are 4.75eV, 4.5eV, and 4.8eV, respectively, it showed the obvious ambipolar characteristics.

• The Journal of Korean Society for Radiation Therapy
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• v.9 no.1
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• pp.64-70
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• 1997

The goal of radiation treatment planning is to deliver the dose to the patient within $5\%$ of that prescribed. We have often encountered the situation that the area which have not only several irregular contours but also tissue heterogeneities should be treated. With conventional devices such as wedges, missing tissue compensator. there are some limitations to achieve the uniform dose distribution in treatment volume. The use of CT simulator, 3-D planning system, computer-controlled milling machine enables it to deliver the dose uniformally. This report includes the whole procedure which have patient data acquisition 3D planning, computer-controlled milling, performance verification of 3D compensator, and TLD evaluation. We applied it for the treatment of head and heck cancer only. In Spite of the irregular contour and different electron density of tessue, we have achieved the uniformity of the dose distribution within ${\pm}3\%$ relatively. Although there are some problems which are not only verification of performance but uncertainties of using the new treatment device, we believe that the improvement of dosimetry will eliminate the uncertainties of that application. so the other lesions besides head and neck can will be ale to use the 3D compensator to achieve the dose uniformity