• Title/Summary/Keyword: Design memory management

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Design and Implementation of Linux based Real-Time Kernel for Robot Control (로봇 제어용 리눅스 기반 실시간 커널의 설계 및 구현)

  • 노현창;고낙용;김태영
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.414-414
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    • 2000
  • This paper presents a method for building a real-time kernel of autonomous mobile robot control systems. Until now, most of robots have their own operation softwares dedicated only for their use. Sometimes, operation softwares were developed based on MS-DOS or other real -time kernel based on UNIX. However, MS-DOS has many restrictions for use as a robot operation system. Also, mix based real-time kernel has some Limitations for use with mobile robots. So, in this paper, we focus on building a real-time kernel based on Linux. The in this paper, the software modules of Task Management, Memory Management, Intertask Communication, and Synchronization are redesigned. To show the efficiency of the paper, it was applied to run Nomad Super Scout II avoiding obstacles detected by sonar sensor array.

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- Design and Implementation of the secure WPKI Protocol on mobile environment - (무선환경에서 안전한 WPKI Protocol의 설계 및 구현)

  • Jang Yu Jin;Park Sang Min;Shin Seung Ho
    • Journal of the Korea Safety Management & Science
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    • v.6 no.3
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    • pp.161-174
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    • 2004
  • The existing PKI authentication structure uses the OCSP method. The primary task of OCSP is to verify the status of a transaction after verifying the validity of the certificate; but, because of continuing policy changes and updates within the PKI authentication method, the status of certificates and the structures are not consistent. Therefore, the SCVP method can be selected as the broadest method for completing authentication tasks accurately because the SCVP method includes validation of policy changes. An appropriate method for building an mobile environment within the capabilities of low-memory and reduced processing CPU needs to be assessed and developed. This thesis proposes a verification method that is independent of platform and applicable to any 05 in building and expanding the mobile environment.

Design of Image Management Application for Mobile Phone (모바일 폰의 이미지 관리 애플리케이션의 설계)

  • Park, Hung-bog;Seo, Jung-hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.10a
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    • pp.429-430
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    • 2018
  • The introduction of mobile devices increased the need to apply limitations such as mobile devices' memory, speed, energy, and bandwidth on the designs of searching images. There is a demand to reduce such limitations on searching images on the mobile phone. Hence, this paper proposes a design that adds tags on pictures to manage the images in mobile environment, allowing efficient searches and deletion of duplicate files based on the similarities of the images. The proposed method does not compromise its efficiency by increasing costs; it also reduces the volume of data needed for mobile devices.

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Architecture design and FPGA implementation of a system control unit for a multiprocessor chip (다중 프로세서 칩을 위한 시스템 제어 장치의 구조설계 및 FPGA 구현)

  • 박성모;정갑천
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.12
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    • pp.9-19
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    • 1997
  • This paper describes the design and FPGA implementation of a system control unit within a multiprocessor chip which can be used as a node processor ina massively parallel processing (MPP) caches, memory management units, a bus unit and a system control unit. Major functions of the system control unit are locking/unlocking of the shared variables of protected access, synchronization of instruction execution among four integer untis, control of interrupts, generation control of processor's status, etc. The system control unit was modeled in very high level using verilog HDL. Then, it was simulated and verified in an environment where trap handler and external interrupt controller were added. Functional blocks of the system control unit were changed into RTL(register transfer level) model and synthesized using xilinx FPGA cell library in synopsys tool. The synthesized system control unit was implemented by Xilinx FPGA chip (XC4025EPG299) after timing verification.

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A Design of Integrated Manufacturing System for Compound Semiconductor Fabrication (화합물 반도체 공장의 통합생산시스템 설계에 관한 연구)

  • 이승우;박지훈;이화기
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.26 no.3
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    • pp.67-73
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    • 2003
  • Manufacturing technologies of compound semiconductor are similar to the process of memory device, but management technology of manufacturing process for compound semiconductor is not enough developed. Semiconductor manufacturing environment also has been emerged as mass customization and open foundry service so integrated manufacturing system is needed. In this study we design the integrated manufacturing system for compound semiconductor fabrication t hat has monitoring of process, reduction of lead-time, obedience of due-dates and so on. This study presents integrated manufacturing system having database system that based on web and data acquisition system. And we will implement them in the actual compound semiconductor fabrication.

Design and Implementation of Multimedia Learning System based PDA (PDA기반 멀티미디어 학습시스템 설계 및 구현)

  • Lee, Sun-Ki;Kim, Chang-Soo;Shim, Kyu-Bark
    • Journal of Fisheries and Marine Sciences Education
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    • v.16 no.2
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    • pp.163-170
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    • 2004
  • The rapid exchanges of mobile computing environment and development of wireless communication are providing many effects for learning activity of students. Recently, PDA system developers which are studying memory capacity, communication speed and size of screen support techniques to be capable of learning from students in the wireless or moving environment. In this viewpoints, this paper has a purpose to design multimedia learning system to be able to do with sound lecture contents. The implemented system largely consists of two parts which have the teacher module and students module. The one manages learning progress of students, class management, bulletin board and etc. The other is capable of using studying and bulletin functions. The main idea of this research is focus to upgrade the effect of learning without almost treating the existing studies, which can be listening sound lecture and also seeing text and image at the same time.

Design of Scalable Intra-prediction Architecture for H.264 Decoders (H.264 복호기를 위한 스케일러블 인트라 예측기 구조 설계)

  • Lee, Chan-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.11
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    • pp.77-82
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    • 2008
  • H.264 is a video coding standard of ITU-T and ISO/IEC, and widely spreads its application due to its high compression ratio more than twice that of MPEG-2 and high image quality. It has different architecture depending on demands since it is a lied from small image of QVGA to large size of HD. In this paper, We propose a scalable architecture for intra-prediction of H.264 decoders. The proposed scheme has a scalable architecture that can accommodate up to 4 processing elements depending on performance demands and can reduce the number of access to memory using efficient memory management so as to be energy-efficient. We design the intra-prediction unit using Verilog-HDL and verily it by prototyping using an FPGA. The performance is analyzed using the results of design.

Design and Implementation of Buffer Management Method for Enhancing Performance of Open GIS Components (개방형 GIS 컴포넌트의 성능 개선을 위한 버퍼 관리 방법의 설계 및 구현)

  • Cho, Dae-Soo;Min, Kyoung-Wook
    • The KIPS Transactions:PartD
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    • v.11D no.1
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    • pp.51-60
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    • 2004
  • In open GIS environment, a GIS client can access spatial data in different types of GIS sowers with the same Interfaces. This means that open GIS components software ensures the interoperability throughout the heterogeneous GIS servers. The user response time, however, tends to be increased, if the client makes use of the standard interfaces for data accesses that can ensure interoperability. This is because the format of spatial data accessed from a specific GIS server must be transformed into common format, such as Rowset in OLE/DB, which is compatible with the standard interfaces. In this paper, we develop efficient techniques for data buffering in GIS client to reduce the response time. We design the buffer management method, which Is based on the space partitioning, and Integrate buffer management components into MapBase, an open GIS component software. And we also, show that buffer management proposed in this paper yields significant performance improvement in GIS client.

Design of the Entropy Processor using the Memory Stream Allocation for the Image Processing (메모리 스트림 할당 기법을 이용한 영상처리용 엔트로피 프로세서 설계)

  • Lee, Seon-Keun;Jeong, Woo-Yeol
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.5
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    • pp.1017-1026
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    • 2012
  • Due to acceleration of the IT industry and the environment for a variety of media in modern society, such as real-time video images 3D-TV is a very important issue. These high-quality live video is being applied to various fields such as CCTV footage has become an important performance parameters. However, these high quality images, even vulnerable because of shortcomings secure channel or by using various security algorithms attempt to get rid of these disadvantages are underway very active. These shortcomings, this study added extra security technologies to reduce the processing speed image processing itself, but by adding security features to transmit real-time processing and security measures for improving the present.

Two-Level Multi-Scan Scheduler Using Resource Partition Strategy by Loose Processor-Affinity

  • Sohn, Jong-Moon;Kim, Gil-Yong
    • Journal of Electrical Engineering and information Science
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    • v.2 no.3
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    • pp.105-112
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    • 1997
  • The performance of a shared memory multiprocessor system is very sensitive to process scheduling. w can enhance the performance of a whole system as well as of an individual process by taking the multiprocessor characteristics into account in the design of the process scheduler. In this paper, we proposed a general purpose scheduler for a shared memory multiprocessor, called the Two-Level Multi-Scan (TLMS) process scheduler, that considers the processor affinity loosely and decreases the interference among multiple processors greatly. The TLMS scheduler is composed of a local scheduler at each processor and a semi-global scheduler that balances the load among processors. In particular, the semi-global scheduler tries to minimize priority inversion, which is an important factor of the system performance. The TLMS scheduler also tries to reduce the number of resources to be shared and improves the processor utilization. to meet these requirements, th semi-global scheduler interacts with the operation of the local scheduler when a need arises, thus the name is loose processor-affinity. We also show that the proposed scheduling technique can be extended for other types of resources making it a general purpose resource management queue.

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