• Title/Summary/Keyword: Design frequency

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A Study on the Realization of Cascaded Biquad SCF (Caseaded Biquad SCF의 구현에 관한 연구)

  • 김용섭;이상원;주양성;김수원;김덕진
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.9
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    • pp.1436-1441
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    • 1990
  • Prototype Switched Capacitor 4th order Low pass and Band Pass Filters were Realized and tested. Their capacitor values were determined by using automatic SCF design tool. Each filter was designed to operate in voiceband frequency, and practical solutions to improve its frequency characteristics were given. Experimental results show the validity of automatic SCF design program. Simulation and experimental results were fully compared and optimum design conditions were summarized.

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Analytic Design of a Ferroresonant Transformer for Microwave Heating System (초고주파 가열장치에 사용하는 철공진 변압기의 해석적 설계)

  • 나정웅;김원수
    • 전기의세계
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    • v.28 no.1
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    • pp.53-58
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    • 1979
  • In the microwave heating system, a ferroresonant transformer is used to regulate the magnetron power fluctuation. For the simplification, nonlinear characteristics of the transformer and the magnetron are idealized to be piecewise linear. Dipped peak shape of the magnetron current is explained qualitatively by considering the fundamental and third harmonic frequency components in the circuit. Design equations providing the values of the leakage inductance, turn ratio of the transformer and the capacitance are derived analytically by cosnidering the fundamental frequency component only. The ferroresonant transformer is designed to obtain a required regulation and high input power factor from the derived design equations, and analytical calculations are compared with experimental measurements.

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Design of Frequency Synthesizer Using VCO Multi-Phase Signals (VCO 위상신호를 이용한 주파수 합성기 설계)

  • 이준호;김선홍;김종민;박창선;김동용
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.978-981
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    • 1999
  • In this paper, an improved integer-N frequency synthesizer that can be synthesized into smaller channel space than input signal frequency is presented. The proposed frequency synthesizer also has an characteristics of fast phase locking time. The frequency synthesizer performed in the manner that it divides various outputs of different phases in VCO by means of dividers that have different control signals respectively and then add the divided signal. In order to confirm the characteristics of proposed frequency synthesizer, behavioral and SPICE simulations are performed using C-language and HSPICE respectively.

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A Study on the Effect of the Difference at Design Pattern on the Characteristics of Observation (디자인유형의 차이가 주시특성에 끼치는 영향에 관한 연구)

  • Kim, Jong-Ha;Park, Sun-Myung
    • Korean Institute of Interior Design Journal
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    • v.22 no.1
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    • pp.174-182
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    • 2013
  • This study divided the observation area in an indoor space for area setup to analyse the effect of the difference of design types on the characteristics of observation with the observed time of each area as objects. Though it is thought that the difference of design patterns may be influenced by the factors and material composing the space, no existing approaches have had any quantitatively measuring method. Eye-tracking could be efficiently utilized for observation analysis from the viewpoint of dating observation behavior. The followings are the results of analysing the observation characteristics depending on design pattern. First, 5 observing areas were set up according to concentration of observation time in order for the concentration by area to be examined and the factors of design having effect on the difference of observation patterns by design type could be analysed. Second, as a whole, the observation of modern types showed high observation characteristics. When the difference of observation characteristics by pattern was examined by difference at observation frequency, the observation frequency defined to be more than 50% was seen to be almost same from Area I to III and to get higher from Area IV, and that defined to be 30% was high at Areas III and IV. In Area V, it was very high at natural. Third, that of Area II is no more than 8.2% but had the most observation time. As for observation characteristics, the horizontal observation of the central part was the highest and had more observation frequency at modern type that at natural one. These observation characteristics by area enabled to analyse the observation tendency depending on design characters at relevant area. Fourth, the design factors composing natural type were found to bring more attention when the area showed higher concentration at natural type than at modern one. And the analysis of design factors could make it to be confirmed that the quality of material and background factors in addition to design factors in the area had more effect on sight concentration.

Optimal Design of Micro Actuator Plate Spring Considering Vibration Characteristic (진동 특성을 고려한 마이크로 엑추에이터 판 스프링의 최적설계)

  • 이종진;이호철;유정훈
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2003.11a
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    • pp.220-225
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    • 2003
  • Recent issue of optical actuator is applying to mobile device. It leads actuator to become smaller than conventional type. This paper proposes the design of micro actuator plate spring and analysis of its vibration characteristic. Considering natural frequency of spindle motor, 1st and 2nd eigenfrequency of micro actuator must avoid its natural frequency. First, magnetic circuit is designed by using fine pattern coil and magnetic force is acquired by simulation program. Then, concept design is achieved by topology optimization. From concept design, micro actuator plate spring is embodied through DOE(design of experiment). Finally, considering vibration characteristic simultaneously, optimal plate spring design is determined by RSM(response surface method).

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A General Design Method for the Broadband Multi-Section Power Divider (광대역 다단 전력 분배기의 일반화된 설계 방법)

  • Park, Jun-Seok;Kim, Hyeong-Seok;Im, Jae-Bong
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.51 no.2
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    • pp.85-91
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    • 2002
  • A novel multi-section power divider configuration is Proposed to obtain wide-band frequency performance up to microwave frequency region. Design procedures for the proposed microwave broadband power divider are composed of a Planar multi-section three-Ports hybrid and a waveguide transformer design procedures. The multi∼section power divider is based on design theory of the optimum quarter- wave transformer Furthermore, in order to obtain the broadband isolation performance between the two adjacent output ports, the odd mode equivalent circuit should be matched by using the lossy element such as resistor. The derived design formula for calculating these odd mode∼matching elements is based on the singly terminated filter design theory. The waveguide transformer section is designed to suppress the propagation of the higher order modes such as waveguide modes due to employing the metallic electric wall. Simulation and experiment show excellent performance of multi section power divider.

The Design of Robust DSC-PLL under Distorted Grid Voltage Contained Unbalance on Frequency Variation (주파수 변동시 불평형 전압에 강인한 DSC-PLL 설계 연구)

  • Lee, Jae Do;Cha, Han Ju
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.67 no.11
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    • pp.1447-1454
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    • 2018
  • In this paper, the design of robust DSC-PLL(Delayed Signal Cancellation Phase Locked Loop) is proposed for coping with frequency variation. This method shows significant performance for detection of fundamental positive sequence component voltage when the grid voltage is polluted by grid unbalance and frequency variation. The feedback frequency estimation of DSC-PLL is tracking the drift in the phase by unbalance and frequency variation. The robust DSC PLL is to present the analysis on method and performance under frequency variations. These compensation algorithms can correct for discrepancies of changing the frequency within maximum 193[ms] and improve traditional DSC-PLL. Linear interpolation method is adopted to reduce the discretized errors in the digital implementation of the PLL. For verification of robust characteristic, PLL methods are implemented on FPGA with a discrete fixed point based. The proposed method is validated by both Matlab/Simulink and experimental results based on FPGA(XC7Z030).

Frequency Tracking Error Analysis of LQG Based Vector Tracking Loop for Robust Signal Tracking

  • Park, Minhuck;Kee, Changdon
    • Journal of Positioning, Navigation, and Timing
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    • v.9 no.3
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    • pp.207-214
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    • 2020
  • In this paper, we implement linear-quadratic-Gaussian based vector tracking loop (LQG-VTL) instead of conventional extended Kalman filter based vector tracking loop (EKF-VTL). The LQG-VTL can improve the performance compared to the EKF-VTL by generating optimal control input at a specific performance index. Performance analysis is conducted through two factors, frequency thermal noise and frequency dynamic stress error, which determine total frequency tracking error. We derive the thermal noise and the dynamic stress error formula in the LQG-VTL. From frequency tracking error analysis, we can determine control gain matrix in the LQG controller and show that the frequency tracking error of the LQG-VTL is lower than that of the EKF-VTL in all C/N0 ranges. The simulation results show that the LQG-VTL improves performance by 30% in Doppler tracking, so the LQG-VTL can extend pre-integration time longer and track weaker signals than the EKF-VTL. Therefore, the LQG-VTL algorithm is more robust than the EKF-VTL in weak signal environments.

A Straightforward Estimation Approach for Determining Parasitic Capacitance of Inductors during High Frequency Operation

  • Kanzi, Khalil;Nafissi, Hanidreza R.;Kanzi, Majid
    • Journal of international Conference on Electrical Machines and Systems
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    • v.3 no.3
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    • pp.339-353
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    • 2014
  • A straightforward method for optimal determining of a high frequency inductor's parasitic capacitance is presented. The proposed estimation method is based on measuring the inductor's impedance samples over a limited frequency range bordering on the resonance point considering k-dB deviation from the maximum impedance. An optimized solution to k could be obtained by minimizing the root mean squared error between the measured and the estimated impedance values. The model used to provide the estimations is a parallel RLC circuit valid at resonance frequency which will be transferred to the real model considering the mentioned interval of frequencies. A straightforward algorithm is suggested and programmed using MATLAB which does not require a wide knowledge of design parameters and could be implemented using a spectrum analyzer. The inputs are the measured impedance samples as a function of frequency along with the diameter of the conductors. The suggested algorithm practically provides the estimated parameters of a real inductance model at different frequencies, with or without design information. The suggested work is different from designing a high frequency inductor; it is rather concentration of determining the parameters of an available real inductor that could be easily done by a recipe provided to a technician.

Design of Low voltage High speed Phase Locked Loop (고속 저전압 위상 동기 루프(PLL) 설계)

  • Hwang, In-Ho;Cho, Sang-Bock
    • Proceedings of the KIEE Conference
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    • 2007.04a
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    • pp.267-269
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    • 2007
  • PLL(Phase Locked Loop) are widely used circuit technique in modern electronic systems. In this paper, We propose the low voltage and high speed PLL. We design the PFD(Phase Frequency Detector) by using TSPC (True Single Phase Clock) circuit to improve the performance and solve the dead-zone problem. We use CP(Charge Pump} and LP(Loop filter) for Negative feedback and current reusing in order to solve current mismatch and switch mismatch problem. The VCO(Voltage controlled Oscillator) with 5-stage differential ring oscillator is used to exact output frequency. The divider is implemented by using D-type flip flops asynchronous dividing. The frequency divider has a constant division ratio 32. The frequency range of VCO has from 200MHz to 1.1GHz and have 1.7GHz/v of voltage gain. The proposed PLL is designed by using 0.18um CMOS processor with 1.8V supply voltage. Oscillator's input frequency is 25MHz, VCO output frequency is 800MHz and lock time is 5us. It is evaluated by using cadence spectra RF tools.

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