• 제목/요약/키워드: Design complexity

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경험 혁신과 경영 전략 : 신제품 개발 과정에서의 사용자 경험 디자인(Design for User Experience) (Experience Innovation and Business Strategy : Design for User Experience(UX) in New Product Development(NPD))

  • 신영수;임채린;이선화;김진우
    • 한국IT서비스학회지
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    • 제14권2호
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    • pp.231-251
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    • 2015
  • User Experience (UX) and Experience Innovation have been emphasized in the process of New Product Development (NPD). However, previous works which were conducted within the theme of UX mostly focused on the fragmentary aspects of user's experience in a specific usage-context only. For this reason, it is always hard to deal with questions on how to define the abstract concept of UX and how to apply this important keyword in actually NPD process both for satisfying potential users and for setting a market strategy. To address this issue, we focused on the fact that UX has an aspect of composition like pattern and structure. It means that we can understand the context of UX with clarifying characteristics of relations between user and experiential objects. Also, we referred to two sub-concepts of Complexity, Density and Centrality, as representative characteristics of relations in usage-context. Based on this theoretical background, we attempted to find UX design principles and concepts for NPD from the actual example cases of products and services in the real market. From these whole study process, we expect that our findings could have implications for academic and practical areas within the theme of Human-Centered Innovation.

의류 상품화 과정에서 패션 제품과 베이직 제품의 차이 (제1보) -패션과 베이직 제품의 개념- (Fashion And Basic Apparel Goods In Merchandising Process (Part I) - Concept Of Fashion And Basic Apparel Goods -)

  • 이유리
    • 한국의류학회지
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    • 제28권2호
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    • pp.280-291
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    • 2004
  • Apparel goods are classified by many criteria for ease of merchandising implementation. Fashion and basic goods are also an oucome oi classification. Previous studies pnvide some criteria by which apparel products can be classified into fushion and basic goods. Among those ciiteria, seasonality, fashionability, clothing types, complexity in pnduction, simplicity of style, pioducuon volume, degree of style change by season, could be listed. This study, first explored how apparel merchandisers and designers define fashion and basic goods in relation with those criteria. Definitions of fashion and basic goods were explored in terms of design elements (i.e., style, color, material), production volume, sales ratio, proportion in product assortment, and contribution to profit. The study adopted a qualitative approach by use of eighteen infepth interviews with menhandisers and designers. Six were from women's wear brand, Seven from men's wear brand, and 5 from casual wear brand. All the interviewees agreed that they are using the classification of basic vs. fashion goods. However, they are using diverse terms to indicate the basic and fashion goods. The interviewees defined each group based on its contribution to total sales or profit complexity in design, production volume, and style change by season. Basic goods had a higher level of production quantity, contribute more to profit simpler design, and less style change by season than fashion goods.

최적부호기의 MTCM 성능 이득에 관한 연구 (A Study on Evaluation of MTCM with Optimum Encoder)

  • 김민호;박재운;변건식
    • 한국컴퓨터정보학회논문지
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    • 제4권4호
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    • pp.185-192
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    • 1999
  • 본 논문에서는 Ungerboeck가 설계한 TCM과 Divsalar가 제안한 다중화 지수(k=2)의 다중 트렐리스 변조 (Multiple trellis-coded modulation)을 최적의 부호기 설계를 통하여 상태수의 증가에 따라 대역폭과 전력이 제한된 환경에서 부호화 이득을 얻을 수 있는 조건들을 제안하였다. 해석적 기법의 부호기 설계를 통하여 최적의 트렐리스 부호기를 간단히 구성하였으며, 복호는 비터비 최우복호(MLSE)를 적용하였다. QPSK와 8PSK에서 TCM 시스템에서 상태수가 2상태, 4상태, 8상태로 증가함에 따라 다중화 지수(k=2)의 MTCM과 TCM의 성능을 비교하였으며, 상태수가 매우 작아서 TCM의 트렐리스 선도에 병렬천이가 있을 경우 가우시안 채널에서 MTCM 시스템은 대역폭의 확장없이 TCM 시스템보다 우수한 부호화 이득을 얻을 수 있다.

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와이드 팬츠의 실루엣 변화에 따른 시각적 평가 (A Study on the Visual Evaluation According to Changes in Silhouette of Wide Pants)

  • 이정순
    • 한국의상디자인학회지
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    • 제15권1호
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    • pp.21-30
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    • 2013
  • The purpose of this study is to recognize the differences of visual evaluation by variations in silhouette of the wide pants. The stimuli are 9 samples: One control group, 3 variations of the width of hem line and 3 variations of the silhouette. The data has been obtained from 57 fashion college students. The data has been analyzed by Factor Analysis, Anova, Scheffe's Test. The results of the study are as follows: The visual evaluation by silhouette of wide pants are composed of 5 factors(i.e., physical characteristics, complexity, attractiveness, originality, and stiffness and softness). Among these factors, the physical characteristic is evaluated to be the most important factor. The straight pants were the most attractive and modern when the width of the hem line was 66cm (1st stage), while the pants were uncomfortable and unwearable when the width of the hem line was 98cm (3rd stage). The bell-bottom pants were evaluated to be the most attractive with the average width of the hem line. When the width of the hem line of the flare pants were too wide, it was uncomfortable and unwearable but had its unique originality. When the width of the hem line was narrow, the visual image changed as the pants' silhouette varied. However, when the width of the hem line was wide, the visual image did not change by silhouette.

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하드웨어 고장 검출을 위한 행위레벨 설게에서의 테스트패턴 생성 (High level test generation in behavioral level design for hardware faults detection)

  • 김종현;윤성욱;박승규;김동욱
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1998년도 하계종합학술대회논문집
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    • pp.819-822
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    • 1998
  • The high complexity of digital circuits has changed the digital circuits design mehtods from schemeatic-based to hardware description languages like VHDL, verilog that make hardware faults become more hard to detect. Thus test generation to detect hardware defects is very important part of the design. But most of the test generation methods are gate-level based. In this paper new high-level test generation method to detect stuck-at-faults on gate level is described. This test generation method is independent of synthesis results and reduce the time and efforts for test generation.

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Sliding diagonal Pattern에 의한 Memory Test circuit 설계 (Design of Memory Test Circuit for Sliding Diagonal Patterns)

  • 김대환;설병수;김대용;유영갑
    • 전자공학회논문지A
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    • 제30A권1호
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    • pp.8-15
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    • 1993
  • A concrete disign of memory circuit is presented aiming at the application of sliding diagonal test patterns. A modification of sliding diagonal test pattern includes the complexity reduction from O(n$^{32}$) to O(n) using parallel test memory concept. The control circuit design was based on delay-element, and verified via logic and circuit simulation. Area overhead was evaluated based on physical layout using a 0.7 micron design rule resulting in about 1% area increase for a typical 16Mbit DRAM.

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Design Issues of Digital Display Interface

  • Jeong, Deog-Kyoon;Oh, Do-Hwan
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.993-996
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    • 2007
  • Depending on applications where transmission bandwidth, wire distance, power consumption and EMI environments vary, design trade-offs must be made to optimize the display interface. After introducing the digital display interface architecture, topics such as cost, EMI, signal integrity, scalability and content protection are discussed with available techniques. Implementation issues are discussed regarding their cost and design complexity. Existing standards are reviewed and comparison on their strengths and shortcomings are discussed.

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터보복호기를 위한 SOVA 복호기의 설계 (VLSI Design of SOVA Decoder for Turbo Decoder)

  • 김기보;김종태
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 하계학술대회 논문집 D
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    • pp.3157-3159
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    • 2000
  • Soft Output Viterbi Algorithm is modification of Viterbi algorithm to deliver not only the decoded codewords but also a posteriori probability for each bit. This paper presents SOVA decoder which can be used for component decoder of turbo decoder. We used two-step SMU architectures combined with systolic array traceback methods to reduce the complexity of the design. We followed the specification of CDMA2000 system for SOVA decoder design.

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Fall experience and dual-task during gait performance for community-dwelling persons with stroke

  • Kim, Min-Kyu;Kim, Eunjeong;Hwang, Sujin;Son, Dongwook
    • Physical Therapy Rehabilitation Science
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    • 제7권3호
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    • pp.109-113
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    • 2018
  • Objective: The purpose of this study was to investigate the effects of fall experience and task complexity on gait performance in community-dwelling persons with chronic hemiparetic stroke. Design: Cross-sectional study. Methods: Thirty-three persons who had a history of stroke participated in this study. The participants included 18 persons (aged mean 54.0, mean score of 24.6 points on the Montreal Cognitive Assessment, MoCA) with fall experience (faller group) and 15 persons (aged mean 53.7, mean score of 24.7 points on the MoCA) without fall experience (non-faller group) in the previous six months. This study measured balance and gait performance at two different conditions (with/without 70% of water filled in a 200 cc cup). The participants were clinically assessed using the 10-meter walk test (10MWT), 6-minute walk test (6MWT), Berg Balance scale (BBS), Dynamic Gait Index (DGI), and Timed Up-and-Go (TUG) test. Results: After analyzation, persons in the faller group performed significantly better on the 10MWT, 6MWT, BBS, DGI, and the TUG test in the no-cup-carrying condition than those in the cup-carrying condition (p<0.05). The persons in the non-faller group also performed significantly better in all outcome measures with the no-cup-carrying condition than those in the cup-carrying condition (p<0.05). However, there was no interaction between fall experience and task complexity in the two groups. Conclusions: Our results showed that balance and gait performance depended on fall experience and task complexity but fall experience did not interact with task complexity. Clinicians should consider fall prevention and task complexity during therapeutic approaches in persons with hemiparetic stroke.

GF($2^n$)에서의 직렬-병렬 곱셈기 구조 (Design of Serial-Parallel Multiplier for GF($2^n$))

  • 정석원;윤중철;이선옥
    • 정보보호학회논문지
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    • 제13권3호
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    • pp.27-34
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    • 2003
  • 요즘 암호시스템을 효율적으로 수행하는 하드웨어의 개발이 관심의 대상이 되고 있다. 암호시스템의 효율적인 수행은 연산기의 효율적인 연산이 뒷받침되어야 한다. 특히 유한체 GF(2$^n$)에서의 곱셈기는 여러 연산 중에서 효율성이 고려되어야 할 핵심적인 연산이다. 이 논문에서는 유한체에서의 곱셈기를 시간 복잡도(time complexity)와 하드웨어복잡도(size complexity) 사이의 교환(trade-off)을 고려하여 기존 곱셈기$^{[5][12]}$의 하드웨어 복잡도인 #AND(AND gate 수)= $n^2$, #XOR(XOR gate 수) = $n^2$-1 보다 개선된 #AND = [n/2], #XOR = n([n/2+1])-$\delta$$_{n}$ (n이 짝수이면$\delta$$_{n}$ =1, n이 홀수이면 $\delta$n=0)이고 두 클럭 내에 결과를 얻을 수 있는 직렬-병렬 곱셈기를 제안한다. 우리는 기존의 논문에서 제안된 곱셈기와 구조를 달리하여 공간의 제약이 있는 하드웨어에 적합한 효율적인 연산기의 구현방안을 제시한다.