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Development of the Semi-Crawler Type Mini-Forwarder - Design and Manufacture - (반궤도식 산림작업차 개발(I) - 설계 및 제작 -)

  • Kim, Jae-Hwan;Park, Sang-Jun
    • Journal of Korean Society of Forest Science
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    • v.100 no.2
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    • pp.154-164
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    • 2011
  • This study was conducted to develop the semi-crawler type mini-forwarder that can be operated comfortable small-scale logging operation in the steep terrain and also used at a variety of operations such as the civil work in erosion control and forest-road. Considering the minimum turning radius and the width of forest operation road, the total length, width and loading capacity of the semi-crawler type mini-forwarder is 5,750 mm, 1,900 mm and $2.5m^{3}$, respectively. The maximum engine power is 96ps at 3600 rpm. Selected hydraulic pumps are consists of two main pumps and two sub-main pumps. Main hydraulic pumps are utilized to running motor of the front wheel and rear crawler. Sub-main pumps are utilized to the actuation parts such as steering, crane, out-rigger and dump cylinder. The transmission was adapted as the HST (Hydro-Static Transmission) system. The driving parts are designed and manufactured as the front wheel type and the rear crawler type. The steering type was manufactured as the ackerman type. Driving control parts type was designed and manufactured as driver's seat type of normal cars. It is also attached on auxiliary equipments such as winch, log grapple and out-rigger. The traveling speed of the semi-crawler type mini-forwarder in forest road was 5.3 km/hr to 7.7 km/hr.

High Performance Hardware Implementation of the 128-bit SEED Cryptography Algorithm (128비트 SEED 암호 알고리즘의 고속처리를 위한 하드웨어 구현)

  • 전신우;정용진
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.11 no.1
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    • pp.13-23
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    • 2001
  • This paper implemented into hardware SEED which is the KOREA standard 128-bit block cipher. First, at the respect of hardware implementation, we compared and analyzed SEED with AES finalist algorithms - MARS, RC6, RIJNDAEL, SERPENT, TWOFISH, which are secret key block encryption algorithms. The encryption of SEED is faster than MARS, RC6, TWOFISH, but is as five times slow as RIJNDAEL which is the fastest. We propose a SEED hardware architecture which improves the encryption speed. We divided one round into three parts, J1 function block, J2 function block J3 function block including key mixing block, because SEED repeatedly executes the same operation 16 times, then we pipelined one round into three parts, J1 function block, J2 function block, J3 function block including key mixing block, because SEED repeatedly executes the same operation 16 times, then we pipelined it to make it more faster. G-function is implemented more easily by xoring four extended 4 byte SS-boxes. We tested it using ALTERA FPGA with Verilog HDL. If the design is synthesized with 0.5 um Samsung standard cell library, encryption of ECB and decryption of ECB, CBC, CFB, which can be pipelined would take 50 clock cycles to encrypt 384-bit plaintext, and hence we have 745.6 Mbps assuming 97.1 MHz clock frequency. Encryption of CBC, OFB, CFB and decryption of OFB, which cannot be pipelined have 258.9 Mbps under same condition.

Design of an Efficient Bit-Parallel Multiplier using Trinomials (삼항 다항식을 이용한 효율적인 비트-병렬 구조의 곱셈기)

  • 정석원;이선옥;김창한
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.13 no.5
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    • pp.179-187
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    • 2003
  • Recently efficient implementation of finite field operation has received a lot of attention. Among the GF($2^m$) arithmetic operations, multiplication process is the most basic and a critical operation that determines speed-up hardware. We propose a hardware architecture using Mastrovito method to reduce processing time. Existing Mastrovito multipliers using the special generating trinomial p($\chi$)=$x^m$+$x^n$+1 require $m^2$-1 XOR gates and $m^2$ AND gates. The proposed multiplier needs $m^2$ AND gates and $m^2$+($n^2$-3n)/2 XOR gates that depend on the intermediate term xn. Time complexity of existing multipliers is $T_A$+( (m-2)/(m-n) +1+ log$_2$(m) ) $T_X$ and that of proposed method is $T_X$+(1+ log$_2$(m-1)+ n/2 ) )$T_X$. The proposed architecture is efficient for the extension degree m suggested as standards: SEC2, ANSI X9.63. In average, XOR space complexity is increased to 1.18% but time complexity is reduced 9.036%.

Design and Implementation of Mobile Medical Information System Based Radio Frequency IDentification (RFID 기반의 모바일 의료정보시스템의 설계 및 구현)

  • Kim, Chang-Soo;Kim, Hwa-Gon
    • Journal of radiological science and technology
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    • v.28 no.4
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    • pp.317-325
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    • 2005
  • The recent medical treatment guidelines and the development of information technology make hospitals reduce the expense in surrounding environment and it requires improving the quality of medical treatment of the hospital. That is, with the new guidelines and technology, hospital business escapes simple fee calculation and insurance claim center. Moreover, MIS(Medical Information System), PACS(Picture Archiving and Communications System), OCS(Order Communicating System), EMR(Electronic Medical Record), DSS(Decision Support System) are also developing. Medical Information System is evolved toward integration of medical IT and situation si changing with increasing high speed in the ICT convergence. These changes and development of ubiquitous environment require fundamental change of medical information system. Mobile medical information system refers to construct wireless system of hospital which has constructed in existing environment. Through RFID development in existing system, anyone can log on easily to Internet whenever and wherever. RFID is one of the technologies for Automatic Identification and Data Capture(AIDC). It is the core technology to implement Automatic processing system. This paper provides a comprehensive basic review of RFID model in Korea and suggests the evolution direction for further advanced RFID application services. In addition, designed and implemented DB server's agent program and Client program of Mobile application that recognized RFID tag and patient data in the ubiquitous environments. This system implemented medical information system that performed patient data based EMR, HIS, PACS DB environments, and so reduced delay time of requisition, medical treatment, lab.

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Design of EMI Reduction of SMPS Using MLCC Filters (MLCC를 이용한 SMPS의 EMI 저감 설계)

  • Choi, Byeong-In;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.27 no.4
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    • pp.97-105
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    • 2020
  • Recently, as the data speed and operating frequencies of Ethernet keeps increasing, electro magnetic interference (EMI) also becomes increasing. The generation of such EMI will cause malfunction of near electronic devices. In this study, EMI filters were applied to reduce the EMI generated by DC-DC SMPS (switching mode power supply), which is the main cause of EMI generation of Ethernet switch. As the EMI filter, MLCCs with excellent withstanding voltage characteristics were used, which had advantages in miniaturization and mass production. Two types of EMI MLCC filters were used, which are X-capacitor and X, Y-capacitor. X-capacitor was composed of 2 MLCCs with 10 nF and 100 nF capacity and 1 Mylar capacitor. Y-capacitor was consisted of 6 MLCCs with a capacity of 27 nF. When only X-capacitor was applied as EMI filter, the conductive EMI field strength exceeded the allowable limit in frequency range of 150 kHz ~ 30 MHz. The radiative EMI also showed high EMI strength and very small allowable margin at the specific frequencies. When the X and Y-capacitors were applied, the conductive EMI was greatly reduced, and the radiation EMI was also found to have sufficient margin. In addition, X, Y-capacitors showed very high insulation resistance and withstanding resistance performances. In conclusion, EMI X, Y-capacitors using MLCCs reduced the EMI noise effectively and showed excellent electrical reliability.

Design and Implementation of a Hardware Accelerator for Marine Object Detection based on a Binary Segmentation Algorithm for Ship Safety Navigation (선박안전 운항을 위한 이진 분할 알고리즘 기반 해상 객체 검출 하드웨어 가속기 설계 및 구현)

  • Lee, Hyo-Chan;Song, Hyun-hak;Lee, Sung-ju;Jeon, Ho-seok;Kim, Hyo-Sung;Im, Tae-ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.24 no.10
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    • pp.1331-1340
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    • 2020
  • Object detection in maritime means that the captain detects floating objects that has a risk of colliding with the ship using the computer automatically and as accurately as human eyes. In conventional ships, the presence and distance of objects are determined through radar waves. However, it cannot identify the shape and type. In contrast, with the development of AI, cameras help accurately identify obstacles on the sea route with excellent performance in detecting or recognizing objects. The computer must calculate high-volume pixels to analyze digital images. However, the CPU is specialized for sequential processing; the processing speed is very slow, and smooth service support or security is not guaranteed. Accordingly, this study developed maritime object detection software and implemented it with FPGA to accelerate the processing of large-scale computations. Additionally, the system implementation was improved through embedded boards and FPGA interface, achieving 30 times faster performance than the existing algorithm and a three-times faster entire system.

Does sports intelligence, the ability to read the game, exist? A systematic review of the relationship between sports performance and cognitive functions (게임을 읽는 머리, 스포츠 지능이 존재하는가? 스포츠 수행과 관련된 인지기능에 관한 문헌고찰)

  • Yongtawee, Atcharat;Park, Jin-Han;Woo, Min-Jung
    • Journal of the Korea Convergence Society
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    • v.12 no.3
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    • pp.325-339
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    • 2021
  • The purpose of the study is to examine sports-related cognitive functions through a systematic review and to suggest effective instruments to measure the cognitive functions. The present study was conducted based on the systematic review and meta-analysis protocol-the PRISMA. Of 429 articles searched through keywords from 2008 to 2020, 45 articles that met the selection criteria were analyzed. It was revealed that athletes had better cognitive functions than non-athletes, that the higher the sports expertise was, the higher the cognitive functions, and that there were differences in cognitive functions according to the sport types. The primary cognitive functions related to sports performance summarized as executive functions (inhibition ability, cognitive flexibility), information processing speed, spatial ability, and attention. As tasks for measuring each cognitive function, a stop signal task for inhibition ability, a design flexibility task for cognitive flexibility, a simple and choice reaction time test for information processing, a mental rotation task for spatial ability, and an attention network test for attention are appropriate.

A New Incentive Based Bandwidth Allocation Scheme For Cooperative Non-Orthogonal Multiple Access (협력 비직교 다중 접속 네트워크에서 새로운 인센티브 기반 주파수 할당 기법)

  • Kim, Jong Won;Kim, Sung Wook
    • KIPS Transactions on Computer and Communication Systems
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    • v.10 no.6
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    • pp.173-180
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    • 2021
  • Non Orthogonal Multiple Access (NOMA) is a technology to guarantee the explosively increased Quality of Service(QoS) of users in 5G networks. NOMA can remove the frequent orthogonality in Orthogonal Multiple Access (OMA) while allocating the power differentially to classify user signals. NOMA can guarantee higher communication speed than OMA. However, the NOMA has one disadvantage; it consumes a more energy power when the distance increases. To solve this problem, relay nodes are employed to implement the cooperative NOMA control idea. In a cooperative NOMA network, relay node participations for cooperative communications are essential. In this paper, a new bandwidth allocation scheme is proposed for cooperative NOMA platform. By employing the idea of Vickrey-Clarke-Groves (VCG) mechanism, the proposed scheme can effectively prevent selfishly actions of relay nodes in the cooperative NOMA network. Especially, base stations can pay incentives to relay nodes as much as the contributes of relay nodes. Therefore, the proposed scheme can control the selfish behavior of relay nodes to improve the overall system performance.

IoT-Based Device Utilization Technology for Big Data Collection in Foundry (주물공장의 빅데이터 수집을 위한 IoT 기반 디바이스 활용 기술)

  • Kim, Moon-Jo;Kim, DongEung
    • Journal of Korea Foundry Society
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    • v.41 no.6
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    • pp.550-557
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    • 2021
  • With the advent of the fourth industrial revolution, the interest in the internet of things (IoT) in manufacturing is growing, even at foundries. There are several types of process data that can be automatically collected at a foundry, but considerable amounts of process data are still managed based on handwriting for reasons such as the limited functions of outdated production facilities and process design based on operator know-how. In particular, despite recognizing the importance of converting process data into big data, many companies have difficulty adopting these steps willingly due to the burden of system construction costs. In this study, the field applicability of IoT-based devices was examined by manufacturing devices and applying them directly to the site of a centrifugal foundry. For the centrifugal casting process, the temperature and humidity of the working site, the molten metal temperature, and mold rotation speed were selected as process parameters to be collected. The sensors were selected in consideration of the detailed product specifications and cost required for each process parameter, and the circuit was configured using a NodeMCU board capable of wireless communication for IoT-based devices. After designing the circuit, PCB boards were prepared for each parameter, and each device was installed on site considering the working environment. After the on-site installation process, it was confirmed that the level of satisfaction with the safety of the workers and the efficiency of process management increased. Also, it is expected that it will be possible to link process data and quality data in the future, if process parameters are continuously collected. The IoT-based device designed in this study has adequate reliability at a low cast, meaning that the application of this technique can be considered as a cornerstone of data collecting at foundries.

Cyber Threats Analysis of AI Voice Recognition-based Services with Automatic Speaker Verification (화자식별 기반의 AI 음성인식 서비스에 대한 사이버 위협 분석)

  • Hong, Chunho;Cho, Youngho
    • Journal of Internet Computing and Services
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    • v.22 no.6
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    • pp.33-40
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    • 2021
  • Automatic Speech Recognition(ASR) is a technology that analyzes human speech sound into speech signals and then automatically converts them into character strings that can be understandable by human. Speech recognition technology has evolved from the basic level of recognizing a single word to the advanced level of recognizing sentences consisting of multiple words. In real-time voice conversation, the high recognition rate improves the convenience of natural information delivery and expands the scope of voice-based applications. On the other hand, with the active application of speech recognition technology, concerns about related cyber attacks and threats are also increasing. According to the existing studies, researches on the technology development itself, such as the design of the Automatic Speaker Verification(ASV) technique and improvement of accuracy, are being actively conducted. However, there are not many analysis studies of attacks and threats in depth and variety. In this study, we propose a cyber attack model that bypasses voice authentication by simply manipulating voice frequency and voice speed for AI voice recognition service equipped with automated identification technology and analyze cyber threats by conducting extensive experiments on the automated identification system of commercial smartphones. Through this, we intend to inform the seriousness of the related cyber threats and raise interests in research on effective countermeasures.