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http://dx.doi.org/10.6109/jkiice.2020.24.10.1331

Design and Implementation of a Hardware Accelerator for Marine Object Detection based on a Binary Segmentation Algorithm for Ship Safety Navigation  

Lee, Hyo-Chan (Oceanic IT Convergence Technology Research Center, Hoseo University)
Song, Hyun-hak (Department of Information and Communication Engineering, Hoseo University)
Lee, Sung-ju (Department of Information and Communication Engineering, Hoseo University)
Jeon, Ho-seok (Department of Information and Communication Engineering, Hoseo University)
Kim, Hyo-Sung (Research Institute, San Engineering)
Im, Tae-ho (Department of Information and Communication Engineering, Hoseo University)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.24, no.10, 2020 , pp. 1331-1340 More about this Journal
Abstract
Object detection in maritime means that the captain detects floating objects that has a risk of colliding with the ship using the computer automatically and as accurately as human eyes. In conventional ships, the presence and distance of objects are determined through radar waves. However, it cannot identify the shape and type. In contrast, with the development of AI, cameras help accurately identify obstacles on the sea route with excellent performance in detecting or recognizing objects. The computer must calculate high-volume pixels to analyze digital images. However, the CPU is specialized for sequential processing; the processing speed is very slow, and smooth service support or security is not guaranteed. Accordingly, this study developed maritime object detection software and implemented it with FPGA to accelerate the processing of large-scale computations. Additionally, the system implementation was improved through embedded boards and FPGA interface, achieving 30 times faster performance than the existing algorithm and a three-times faster entire system.
Keywords
Computer vision; Hardware accelerator; Binary segmentation; Maritime autonomous surface ship;
Citations & Related Records
Times Cited By KSCI : 4  (Citation Analysis)
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1 S. Li and K. S. Fung, "Maritime autonomous surface ships (MASS): implementation and legal issues," Maritime Business Review, vol. 4, no. 4, pp. 330-339, Nov. 2019.   DOI
2 J. S. Kang and M. S. Kang, "FPGA Implementation of ARIA Crypto-processor Based on Advanced Key Scheduling," Journal of Security Engineering, vol. 13, no. 6, pp. 439-450, Dec. 2016.   DOI
3 J. Lee, "Implementation and Performance Evaluation of PCI express on Xilinx FPGA," Journal of the Korea Institute of Information and Communication Engineering, vol. 22, no. 12, pp. 1667-1674, Dec. 2018.   DOI
4 T. Praczyk, "A quick algorithm for horizon line detection in marine images," Journal of Marine Science and Technology, vol. 23, no. 1, pp. 164-177, Jul. 2017.   DOI
5 C. Y. Jeong, H. S. Yang, and K. Moon, "Fast horizon detection in maritime images using region-of-interest," International Journal of Distributed Sensor Networks, vol. 14, no. 7, pp. 1-11, Jul. 2018.
6 J. R. Lee, K. R. Bae, and B. Moon, "A Hardware Architecture of Hough Transform Using an Improved Voting Scheme," The Journal of Korea Information and Communications Society, vol. 38A, no. 9, pp. 773-781, Sep. 2013.
7 N. Otsu, "A Threshold Selection Method from Gray-Level Histograms," IEEE Transactions on Systems, Man, and Cybernetics, vol. 9, no. 1, pp. 62-66, Jan. 1979.   DOI
8 L. He, X. Ren, Q. Gao, X. Zhao, B. Yao, and Y. Chao, "The connected-component labeling problem: A review of state-of-the-art algorithms," Pattern Recognition, vol. 70, pp. 25-43, Oct. 2017.   DOI
9 F. Bolelli, M. Cancilla, and C. Grana, "Two More Strategies to Speed Up Connected Components Labeling Algorithms," In:19th International Conference on Image Analysis and Processing, pp. 48-58, Oct. 2017.
10 H. H. Song, H. C. Lee, S. J. Lee, H. S. Jeon, and T. H. Im, "Design of Video Pre-processing Algorithm for High-speed Processing of Maritime Object Detection System and Deep Learning based Integrated System," Journal of Internet Computing and Services, vol. 21, no. 4, pp. 117-126, Aug. 2020.   DOI
11 A. Cortes, I. Velez, and A. Irizar, "High level synthesis using Vivado HLS for Zynq SoC: Image processing case studies," in 2016 Conference on Design of Circuits and Integrated Systems (DCIS), Nov. 2016.
12 H. Rezatofighi, N. Tsoi, J. Gwak, A. Sadeghian, I. Reid, and S. Savarese, "Generalized Intersection Over Union: A Metric and a Loss for Bounding Box Regression," in 2019 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), Feb. 2019.
13 S. Alex David, S. Ravikumar, and A. Rizwana Parveen, "Raspberry Pi in Computer Science and Engineering Education," In Intelligent Embedded Systems. Springer, Singapore, pp. 11-16, Feb. 2018.
14 M. D. Hill and M. R. Marty, "Amdahl's Law in the Multicore Era," IEEE Computer, vol. 41, no. 7, pp. 33-38, Jul. 2008.   DOI
15 K. I. Kim, "Binary Connected-component Labeling using a Multicore CPU," Journal of Korean Institute of Information Technology, vol. 11 no. 4, pp. 77-84, Apr. 2013.
16 D. K. Prasad, D. Rajan, L. Rachmawati, E. Rajabally, and C. Quek, "Video Processing From Electro-Optical Sensors for Object Detection and Tracking in a Maritime Environment: A Survey," IEEE Transactions on Intelligent Transportation Systems, vol. 18, no. 8, pp. 1993-2016, Aug. 2017.   DOI