• 조명전기설비학회논문지
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• 제13권4호
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• pp.127-133
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• 1999

본 논문은 배전계통에 전지전력저장시스템(Battery Energy Storage System: BESS)를 연계하여 운전하는 경우 BESS의 유.무효전력 제어에 대하여 연구하였다. BESS을 배전계통에 연계하는 경우, 이의 유.무효전력 출력을 제어함으로써 배전계통에 일정 전력을 공급, 첨두 부하를 삭감하고 전압을 보상할 수 있다. 본 논문에서는 배전계통과 전지전력저장시스템을 등가 모델링 하였고 전지전력저장시스템의 유.무효 전력제어를 위한 전력 조류 방정식을 제시하였다. 본 논문에서는 BESS의 유.무효전력을 제어하기 위하여 $P-\delta$와 Q-V 제어를 사용하였고 이를 입증하기 위하여 BESS의 유.무효전력 제어를 PSCAD/EMTDC 프로그램을 이용하여 시뮬레이션 하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.966-968
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• 1992

We have done the insulation diagnostic test of generators in domestic five power plants since 1987 and tested A.C. current increasing rate($\Delta$I), $\Delta$tan$\delta$ and partial discharge in generator winding insulation. This study is described the correlation between nondestructive result(A.C. current increasing rate, $\Delta$tan$\delta$ and partial discharge) and lapse of time in generators.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권1호
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• pp.10-17
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• 2012

This paper presents a clock regenerator using two $2^{nd}$ order ${\sum}-{\Delta}$ (sigma-delta) modulators for wide range of dividing ratio as defined in HDMI standard. The proposed circuit adopts a fractional-N frequency synthesis architecture for PLL-based clock regeneration. By converting the integer and decimal part of the N and CTS values in HDMI format and processing separately at two different ${\sum}-{\Delta}$ modulators, the proposed circuit covers a very wide range of the dividing ratio as HDMI standard. The circuit is fabricated using 0.18 ${\mu}m$ CMOS and shows 13 mW power consumption with an on-chip loop filter implementation.

• ETRI Journal
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• 제31권4호
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• pp.393-398
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• 2009

The operation of a first-order 2-bit adaptive sigma-delta modulation system is described and discussed in this paper. The system operation is based on the combination of both "memory" and "look-ahead" estimation in the employed step-size adaptation algorithm of the basic quantizer. In comparison to simple systems and other adaptive sigma-delta systems, computer simulation results show that these features of the described system are responsible for the high SNR values and the extended dynamic range achieved for AC signals as well as the noise power reduction of almost 10 dB and the complete elimination of the idle tones for DC signals. However, such an advantageous performance requires the least possible multiplicative error accumulation, and this cannot be achieved without analog circuits of the highest possible accuracy.

• 한국전기전자재료학회논문지
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• 제25권6호
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• pp.474-480
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• 2012

Diagnostic tests were performed on two high voltage(HV) motor stator windings. These tests included the measurement of insulation resistance, polarization index, AC current, dissipation factor($tan{\delta}$) and partial discharge(PD) magnitude. Surface contamination of HV motor stator windings has an effect on the AC current and $tan{\delta}$. When the stator windings were finished cleaning and insulation reinforcement, the increase rate of AC current(${\Delta}I$) and dissipation factor(${\Delta}tan{\delta}$) were very small compared to those before cleaning. However, the PD magnitude remained the same. These tests show that cleaning and insulation reinforcement of HV motor stator windings can reduce the insulation failure.

• 대한임베디드공학회논문지
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• 제4권3호
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• pp.103-111
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• 2009

Software update has been regarded as one of fundamental functions in wireless sensor networks. It can disseminate a delta-image between a current software image operating on a sensor node and its new image in order to reduce an update image(transmission data) size, resultantly saving energy. In addition, code-banking capability of micro-controllers can decrease the update image size. In order to maximize the efficiency of the software update, the proposed scheme exploits both the delta-image and the code-banking at the same time. Besides, it additionally delivers a recovery delta-image to properly handle abnormal conditions, such as message corruptions and unexpected power-off during the update.

• 한국초전도학회:학술대회논문집
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• 한국초전도학회 2002년도 High Temperature Superconductivity Vol.XII
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• pp.9-9
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• 2002

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권2호
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• pp.294-301
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• 2017

This paper presents a low power ${\Sigma}{\Delta}$ modulator for an implantable chip to acquire a bio-signal such as EEG, DBS, and EMG. In order to reduce a power consumption of the proposed fourth order modulator, two op-amps utilized for the first two integrators are reconfigured to drive the second two integrators. The KT/C noise reduction circuit in the first two integrators is employed to enhance SNR of the modulator. The proposed circuit was fabricated in a 0.18 um CMOS n-well 1 poly 6 metal process with the active chip core area of $900um{\times}800um$ and the power consumption of 830 uW. Measurement results were demonstrated to be SNDR of 76 dB, DR of 77 dB, ENOB of 12.3 bit at the input frequency of 250 Hz and the clock frequency of 256 kHz. FOM1 and FOM2 were measured to be 41 pJ/step and 142.4 dB, respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권3호
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• pp.313-321
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• 2014

A low-power low-cost polar transmitter for EDGE is designed in $0.18{\mu}m$ CMOS. A differential delta-sigma modulator (DSM) tunes a three-terminal voltage-controlled oscillator (VCO) to perform RF phase modulation, where the VCO tuning curve is digitally pre-compensated for high linearity and the carrier frequency is calibrated by a dual-mode low-power frequency-locked loop (FLL). A digital intermediate-frequency (IF) pulse-width5 modulator (PWM) drives a complementary power-switch followed by an LC filter to achieve envelope modulation with high efficiency. The proposed transmitter with 9mW power dissipation relaxes the time alignment between the phase and envelope modulations, and achieves an error vector magnitude (EVM) of 4% and phase noise of -123dBc/Hz at 400kHz offset frequency.

• Journal of Electrical Engineering and Technology
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• 제3권4호
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• pp.468-475
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• 2008

This paper presents a method for estimating the transient stability status of the power system using radial basis function(RBF) neural network with a fast hybrid training approach. A normalized transient energy margin(${\Delta}V_n$) has been obtained by the potential energy boundary surface(PEBS) method along with a time-domain simulation technique, and is used as an output of the RBF neural network. The RBF neural network is then trained to map the operating conditions of the power system to the ${\Delta}V_n$, which provides a measure of the transient stability of the power system. The proposed approach has been successfully applied to the 10-machine 39-bus New England test system, and the results are given.