1 |
W.-Y. Kim, "1-bit and multi-bit envelope deltasigma modulators for CDMA polar transmitters," Microwave Conference, 2008, APMC 2008, Asia- Pacific, 16-20, pp.1-4, Dec., 2008.
|
2 |
M. Hassan, P.M. Asbeck, and L.E. Larson, "A CMOS dual-switching power-supply modulator with 8% efficiency improvement for 20MHz LTE envelope tracking RF power amplifiers," Solid- State Circuits Conference, 2013. ISSCC 2013. Digest of Technical Papers. IEEE International, 17-21, pp. 366-367, Feb., 2013.
|
3 |
F. You, B. Zhang, et al, "Analysis of a broadband high-efficiency switch-mode ΔΣ supply modulator based on a class-E amplifier and a class-E rectifier," Microwave Theory and Techniques, IEEE Transactions on, Vol.61, No.8, pp.2934-2948, Aug., 2013.
DOI
|
4 |
K.M. Nitin Babu, and K.K. Vinaymurthi, "GSMEDGE modulators for 2.5G system, an efficient parallel implementation on FPGA," Signal Processing, Communications and Computing, 2011, ICSPCC 2011, IEEE International Conference on, 14-16, pp.1-5, Sept., 2011.
|
5 |
A. Chen, and S. Yang, "Reduced complexity CORDIC demodulator implementation for DAMPS and digital IF-sampled receiver," Global Telecommunications Conference, GLOBECOM 1998, 8-12, pp.1491-1496, Nov., 1998.
|
6 |
M.H. Perrott, M.D. Trott, and C.G. Sodini, "A modeling approach for fractional-N frequency synthesizer allowing straightforward noise analysis," Solid-State Circuits, IEEE Journal of, Vol.37, No.8, pp.1028-1038, Aug., 2002.
DOI
|
7 |
J. Lopez, et al, "Design of highly efficient wideband RF polar transmitters using the envelopetracking technique," Solid-State Circuits, IEEE Journal of, Vol.44, No.9, pp.2276-2294, Sept., 2009.
DOI
|
8 |
J. Mehta, et al, "An efficient linearization scheme for a digital polar EDGE transmitter," Circuits and Systems II, IEEE Transactions on, Vol.57, No.3, pp.193-197, Mar., 2010.
DOI
|
9 |
P. Nuyts, et al,"A fully digital delay line based GHz range multimode transmitter front-end in 65-nm CMOS," Solid-State Circuits, IEEE Journal of, Vol.47, No.7, pp.1681-1692, July, 2012.
DOI
|
10 |
J. Chen, et al, "The design of all-digital polar transmitter based on ADPLL and phase synchronized modulator," Solid-State Circuits, IEEE Journal of, Vol.47, No.5, pp.1154-1164, May, 2012.
DOI
|
11 |
M.H. Perrott, et al, "A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5- Mb/s GFSK modulation," Solid-State Circuits, IEEE Journal of, Vol.32, No.12, pp.2048-2060, Dec., 1997.
DOI
ScienceOn
|
12 |
M. Youssef, A. Zolfaghari, et al, "A low-power GSM/EDGE/WCDMA polar transmitter in 65-nm CMOS," Solid-State Circuits, IEEE Journal of, Vol.46, No.12, pp.3061-3074, Dec., 2011.
DOI
|
13 |
P.Y. Wu, and P.K.T. Mok, "A two-phase switching hybrid supply modulator for RF power amplifiers with 9% efficiency improvement," Solid-State Circuits, IEEE Journal of, Vol.45, No.12, pp.2543-2556, Dec., 2010.
DOI
|
14 |
C. Mayer, et al, "A robust GSM/EDGE transmitter using polar modulation techniques," Wireless Technology, 2005, ECWT 2005, The European Conference on, 3-4, pp.93-96, Oct., 2005.
|
15 |
P.J. Nagle, et al, "A wideband linear amplitude modulator for polar transmitters based on the concept of interleaving delta modulation," Solid- State Circuits Conference, 2002. ISSCC 2002. Digest of Technical Papers. IEEE International, 7-7, pp. 234-235, Feb., 2002.
|
16 |
S. Zheng, and H.C. Luong, "A CMOS WCDMA/WLAN digital polar transmitter with AM replica feedback linearization," Solid-State Circuits, IEEE Journal of, Vol.48, No.7, pp.1701-1709, July, 2013.
DOI
|